if (DisableReMat)
return false;
- // FIXME: For now, avoid remating instructions whose definition has a subreg
- // index. It's just incredibly difficult to get right.
- if (MI->findRegisterDefOperand(li.reg)->getSubReg())
- return false;
-
if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF)
return true;
const TargetInstrInfo *TII,
const TargetRegisterInfo *TRI,
VirtRegMap &VRM) {
- TII->reMaterialize(MBB, MII, DestReg, 0, VRM.getReMaterializedMI(Reg));
+ MachineInstr *ReMatDefMI = VRM.getReMaterializedMI(Reg);
+#ifdef NDEBUG
+ const TargetInstrDesc &TID = ReMatDefMI->getDesc();
+ assert(TID.getNumDefs() != 1 &&
+ "Don't know how to remat instructions that define > 1 values!");
+#endif
+ TII->reMaterialize(MBB, MII, DestReg,
+ ReMatDefMI->getOperand(0).getSubReg(), ReMatDefMI);
MachineInstr *NewMI = prior(MII);
for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = NewMI->getOperand(i);
+; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movd | count 1
; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movq
; PR2677
-; FIXME: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movd | count 1
-; We now no longer allow instruction whose def has a sub-reg index to be
-; rematerialized.
-
%struct.Bigint = type { %struct.Bigint*, i32, i32, i32, i32, [1 x i32] }