The constraints are represented by the register class of the original
virtual register created for the inline asm. If the register class were
included in the operand descriptor, we might be able to do this.
For now, just give up on regclass inflation when inline asm is involved.
No test case, this bug hasn't happened yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134226
91177308-0d34-0410-b5e6-
96231b3b80d8
// TRI doesn't have accurate enough information to model this yet.
if (I.getOperand().getSubReg())
return;
+ // Inline asm instuctions don't remember their constraints.
+ if (I->isInlineAsm())
+ return;
const TargetRegisterClass *OpRC =
TII->getRegClass(I->getDesc(), I.getOperandNo(), TRI);
if (OpRC)