- rockchip,cec_enable: hdmi cec function is described as follow
<0>: cec function is disabled.
<1>: cec function is enabled.
+- rockchip,defaultmode: hdmi default output video mode.
Example:
hdmi: hdmi@ff980000 {
} else if (hdmi->autoset) {
hdmi->vic = 0;
} else {
- hdmi->vic = HDMI_VIDEO_DEFAULT_MODE;
+ hdmi->vic = hdmi->property->defaultmode;
}
hdmi->colormode = HDMI_VIDEO_DEFAULT_COLORMODE;
hdmi->colordepth = HDMI_DEPP_COLOR_AUTO;
return HDMI_ERROR_FALSE;
if (hdmi->vic == 0)
- hdmi->vic = HDMI_VIDEO_DEFAULT_MODE;
+ hdmi->vic = hdmi->property->defaultmode;
for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
if (hdmi_mode[i].vic == (hdmi->vic & HDMI_VIC_MASK) ||
/* If parse edid error, we select default mode; */
if (hdmi->edid.specs == NULL ||
hdmi->edid.specs->modedb_len == 0)
- return HDMI_VIDEO_DEFAULT_MODE;
+ return hdmi->property->defaultmode;
/*modelist = list_entry(head->prev,
struct display_modelist, list);*/
else
hdmi->vic = hdmi_find_best_mode(hdmi, hdmi->vic);
if (hdmi->vic == 0)
- hdmi->vic = HDMI_VIDEO_DEFAULT_MODE;
+ hdmi->vic = hdmi->property->defaultmode;
rc = hdmi_set_info(&screen, hdmi);
hdmi_mode[i].mode.xres == 4096)
continue;
if ((feature & SUPPORT_TMDS_600M) == 0 &&
- !(modelist->vic & HDMI_VIDEO_YUV420) &&
+ !(modelist->vic & HDMI_VIDEO_YUV420) &&
hdmi_mode[i].mode.pixclock > 340000000)
continue;
if ((modelist->vic & HDMI_VIDEO_YUV420) &&
int videosrc;
int display;
int feature;
+ int defaultmode;
void *priv;
};
if (!of_property_read_u32(np, "rockchip,cec_enable", &val) &&
(val == 1)) {
- pr_info("hdmi support cec\n");
+ pr_debug("hdmi support cec\n");
rockchip_hdmiv1_property.feature |= SUPPORT_CEC;
}
if (!of_property_read_u32(np, "rockchip,hdcp_enable", &val) &&
(val == 1)) {
- pr_info("hdmi support hdcp\n");
+ pr_debug("hdmi support hdcp\n");
rockchip_hdmiv1_property.feature |= SUPPORT_HDCP;
}
+ if (!of_property_read_u32(np, "rockchip,defaultmode", &val) &&
+ (val > 0)) {
+ pr_debug("default mode is %d\n", val);
+ rockchip_hdmiv1_property.defaultmode = val;
+ } else {
+ rockchip_hdmiv1_property.defaultmode =
+ HDMI_VIDEO_DEFAULT_MODE;
+ }
/*hdmi_dev->grf_base =
syscon_regmap_lookup_by_phandle(np, "rockchip,grf");*/
return 0;
if (!of_property_read_u32(np, "rockchip,cec_enable", &val) &&
(val == 1)) {
- pr_info("hdmi support cec\n");
+ pr_debug("hdmi support cec\n");
rk_hdmi_property.feature |= SUPPORT_CEC;
}
if (!of_property_read_u32(np, "rockchip,hdcp_enable", &val) &&
(val == 1)) {
- pr_info("hdmi support hdcp\n");
+ pr_debug("hdmi support hdcp\n");
rk_hdmi_property.feature |= SUPPORT_HDCP;
}
+ if (!of_property_read_u32(np, "rockchip,defaultmode", &val) &&
+ (val > 0)) {
+ pr_debug("default mode is %d\n", val);
+ rk_hdmi_property.defaultmode = val;
+ } else {
+ rk_hdmi_property.defaultmode = HDMI_VIDEO_DEFAULT_MODE;
+ }
#ifdef CONFIG_MFD_SYSCON
hdmi_dev->grf_base =
syscon_regmap_lookup_by_phandle(np, "rockchip,grf");