Vector shuffle mask <i32 4, i32 5, i32 2, i32 3> should yield "movsd", not "movss".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139686 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 988b55739e0f94eee1be1a775fc50a30676b8787..0839ecd1755d08af6c0a19794ba07e813c83011b 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -6348,7 +6348,9 @@ SDValue getMOVLP(SDValue &Op, DebugLoc &dl, SelectionDAG &DAG, bool HasSSE2) {
   // matching to x86 specific nodes. Note that for the 1st condition all
   // types are matched with movsd.
   if (HasSSE2) {
-    if (NumElems == 2)
+    // FIXME: isMOVLMask should be checked and matched before getMOVLP,
+    // as to remove this logic from here, as much as possible
+    if (NumElems == 2 || !X86::isMOVLMask(SVOp))
       return getTargetShuffleNode(X86ISD::MOVSD, dl, VT, V1, V2, DAG);
     return getTargetShuffleNode(X86ISD::MOVSS, dl, VT, V1, V2, DAG);
   }

diff --git a/test/CodeGen/X86/vec_shuffle-38.ll b/test/CodeGen/X86/vec_shuffle-38.ll
index 978f59eec71640c7dbce4bfa0e67bb9e12544e64..69a2ede758ae9ef01801c680f615f604177bcb58 100644 (file)
--- a/test/CodeGen/X86/vec_shuffle-38.ll
+++ b/test/CodeGen/X86/vec_shuffle-38.ll
@@ -43,3 +43,17 @@ entry:
   %shuffle = shufflevector <4 x float> %vecin1, <4 x float> %vecin2, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
   ret <4 x float> %shuffle
 }
+
+; rdar://10119696
+; CHECK: f
+define <4 x float> @f(<4 x float> %x, double* nocapture %y) nounwind uwtable readonly ssp {
+entry:
+  ; CHECK: movsd  (%
+  ; CHECK-NEXT: movsd  %xmm
+  %u110.i = load double* %y, align 1
+  %tmp8.i = insertelement <2 x double> undef, double %u110.i, i32 0
+  %tmp9.i = bitcast <2 x double> %tmp8.i to <4 x float>
+  %shuffle.i = shufflevector <4 x float> %x, <4 x float> %tmp9.i, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
+  ret <4 x float> %shuffle.i
+}
+