Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  random: Fix handing of arch_get_random_long in get_random_bytes()
  x86: Call stop_machine_text_poke() on all CPUs
  x86, ioapic: Only print ioapic debug information for IRQs belonging to an ioapic chip
  x86/mrst: Avoid reporting wrong nmi status
  x86/mrst: Add support for Penwell clock calibration
  x86/apic: Allow use of lapic timer early calibration result
  x86/apic: Do not clear nr_irqs_gsi if no legacy irqs
  x86/platform: Add a wallclock_init func to x86_platforms ops
  x86/mce: Make mce_chrdev_ops 'static const'

diff --combined arch/x86/platform/mrst/mrst.c
index 541020df0da6713f485b313829def31dab03b334,9b9ee292c107f0b206dd97eb5a9aa2843ebbb171..b1489a06a49dbc5ac0f4acd5eeaddc6136f05c1a
--- 1/arch/x86/platform/mrst/mrst.c
--- 2/arch/x86/platform/mrst/mrst.c
+++ b/arch/x86/platform/mrst/mrst.c
@@@ -187,11 -187,34 +187,34 @@@ int __init sfi_parse_mrtc(struct sfi_ta
  static unsigned long __init mrst_calibrate_tsc(void)
  {
        unsigned long flags, fast_calibrate;
- 
-       local_irq_save(flags);
-       fast_calibrate = apbt_quick_calibrate();
-       local_irq_restore(flags);
- 
+       if (__mrst_cpu_chip == MRST_CPU_CHIP_PENWELL) {
+               u32 lo, hi, ratio, fsb;
+ 
+               rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
+               pr_debug("IA32 perf status is 0x%x, 0x%0x\n", lo, hi);
+               ratio = (hi >> 8) & 0x1f;
+               pr_debug("ratio is %d\n", ratio);
+               if (!ratio) {
+                       pr_err("read a zero ratio, should be incorrect!\n");
+                       pr_err("force tsc ratio to 16 ...\n");
+                       ratio = 16;
+               }
+               rdmsr(MSR_FSB_FREQ, lo, hi);
+               if ((lo & 0x7) == 0x7)
+                       fsb = PENWELL_FSB_FREQ_83SKU;
+               else
+                       fsb = PENWELL_FSB_FREQ_100SKU;
+               fast_calibrate = ratio * fsb;
+               pr_debug("read penwell tsc %lu khz\n", fast_calibrate);
+               lapic_timer_frequency = fsb * 1000 / HZ;
+               /* mark tsc clocksource as reliable */
+               set_cpu_cap(&boot_cpu_data, X86_FEATURE_TSC_RELIABLE);
+       } else {
+               local_irq_save(flags);
+               fast_calibrate = apbt_quick_calibrate();
+               local_irq_restore(flags);
+       }
+       
        if (fast_calibrate)
                return fast_calibrate;
  
@@@ -253,6 -276,17 +276,17 @@@ static void mrst_reboot(void
        intel_scu_ipc_simple_command(0xf1, 0);
  }
  
+ /*
+  * Moorestown does not have external NMI source nor port 0x61 to report
+  * NMI status. The possible NMI sources are from pmu as a result of NMI
+  * watchdog or lock debug. Reading io port 0x61 results in 0xff which
+  * misled NMI handler.
+  */
+ static unsigned char mrst_get_nmi_reason(void)
+ {
+       return 0;
+ }
+ 
  /*
   * Moorestown specific x86_init function overrides and early setup
   * calls.
@@@ -274,6 -308,8 +308,8 @@@ void __init x86_mrst_early_setup(void
        x86_platform.calibrate_tsc = mrst_calibrate_tsc;
        x86_platform.i8042_detect = mrst_i8042_detect;
        x86_init.timers.wallclock_init = mrst_rtc_init;
+       x86_platform.get_nmi_reason = mrst_get_nmi_reason;
+ 
        x86_init.pci.init = pci_mrst_init;
        x86_init.pci.fixup_irqs = x86_init_noop;
  
@@@ -608,7 -644,6 +644,7 @@@ static void *msic_ocd_platform_data(voi
  }
  
  static const struct devs_id __initconst device_ids[] = {
 +      {"bma023", SFI_DEV_TYPE_I2C, 1, &no_platform_data},
        {"pmic_gpio", SFI_DEV_TYPE_SPI, 1, &pmic_gpio_platform_data},
        {"spi_max3111", SFI_DEV_TYPE_SPI, 0, &max3111_platform_data},
        {"i2c_max7315", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data},