Add tSpill and tRestore to the opcodes to replace with tSTRi and tLDRi

respectively.

It may be a bug that these opcodes are getting this far into machine code
generation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121931 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/Thumb1RegisterInfo.cpp b/lib/Target/ARM/Thumb1RegisterInfo.cpp
index 4e77bd87cc2ab7cf735f826b70a2bfec2a56692f..9f917234d13411d0b95e14522d6bb8ec104e0b49 100644 (file)
--- a/lib/Target/ARM/Thumb1RegisterInfo.cpp
+++ b/lib/Target/ARM/Thumb1RegisterInfo.cpp
@@ -356,9 +356,11 @@ static void removeOperands(MachineInstr &MI, unsigned i) {
 static unsigned convertToNonSPOpcode(unsigned Opcode) {
   switch (Opcode) {
   case ARM::tLDRspi:
+  case ARM::tRestore:           // FIXME: Should this opcode be here?
     return ARM::tLDRi;
 
   case ARM::tSTRspi:
+  case ARM::tSpill:             // FIXME: Should this opcode be here?
     return ARM::tSTRi;
   }