set clk_cpul:816M clk_cpub:1008M when clk tree init
Change-Id: I8f493ce8479fc670aa05d651db5be354d6870c98
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks =
+ <&cru ARMCLKL>, <&cru ARMCLKB>,
<&cru PLL_GPLL>, <&cru PLL_CPLL>,
<&cru PLL_NPLL>,
<&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>,
<&cru PCLK_PERILP0>,
<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>;
assigned-clock-rates =
+ <816000000>, <1008000000>,
<594000000>, <800000000>,
<1000000000>,
<150000000>, <75000000>,