ARM: dts: rockchip: convert pinctrl nodes to new bindings
authorHeiko Stuebner <heiko@sntech.de>
Tue, 29 Apr 2014 20:02:52 +0000 (22:02 +0200)
committerHeiko Stuebner <heiko@sntech.de>
Fri, 9 May 2014 23:41:20 +0000 (01:41 +0200)
Introduce the grf syscon and convert the pinctrl drivers for rk3066 and rk3188
to use it, instead of mapping the grf registers themselfs.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Max Schwarz <max.schwarz@online.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
arch/arm/boot/dts/rk3066a.dtsi
arch/arm/boot/dts/rk3188.dtsi
arch/arm/boot/dts/rk3xxx.dtsi

index 4d4dfbb59f4b53590aaf4fe61af6c013f793a03a..048c5de00551e1e108da32d57ab6e6a684468582 100644 (file)
@@ -79,7 +79,7 @@
 
                pinctrl@20008000 {
                        compatible = "rockchip,rk3066a-pinctrl";
-                       reg = <0x20008000 0x150>;
+                       rockchip,grf = <&grf>;
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges;
index bb36596ea20538ac9ac4d74f868c72fed40b5613..d2d886d86afc929a06cb45a5f6f4fcf11c113032 100644 (file)
 
                pinctrl@20008000 {
                        compatible = "rockchip,rk3188-pinctrl";
-                       reg = <0x20008000 0xa0>,
-                             <0x20008164 0x1a0>;
-                       reg-names = "base", "pull";
+                       rockchip,grf = <&grf>;
+                       rockchip,pmu = <&pmu>;
+
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges;
 
                        gpio0: gpio0@0x2000a000 {
                                compatible = "rockchip,rk3188-gpio-bank0";
-                               reg = <0x2000a000 0x100>,
-                                     <0x20004064 0x8>;
+                               reg = <0x2000a000 0x100>;
                                interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk_gates8 9>;
 
index 26e5a968d49d1ffa39619d172237f28c4c74f1a7..2adf1cc9e85df4478c5ed329911dd613356d97f9 100644 (file)
                        reg = <0x1013c000 0x100>;
                };
 
-               pmu@20004000 {
-                       compatible = "rockchip,rk3066-pmu";
+               pmu: pmu@20004000 {
+                       compatible = "rockchip,rk3066-pmu", "syscon";
                        reg = <0x20004000 0x100>;
                };
 
+               grf: grf@20008000 {
+                       compatible = "syscon";
+                       reg = <0x20008000 0x200>;
+               };
+
                gic: interrupt-controller@1013d000 {
                        compatible = "arm,cortex-a9-gic";
                        interrupt-controller;