Adjust register numbers in tests to compensate for the

new lack of R2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96407 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
index d1d28ae15b0daaa633da1aa31904b8a52b4544fe..be28a9a4542b98be41186c9bca58edfb528b3465 100644 (file)
--- a/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
+++ b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
@@ -1,6 +1,6 @@
 ; RUN: llc < %s | grep {subfc r3,r5,r4}
-; RUN: llc < %s | grep {subfze r4,r2}
-; RUN: llc < %s -regalloc=local | grep {subfc r2,r5,r4}
+; RUN: llc < %s | grep {subfze r4,r6}
+; RUN: llc < %s -regalloc=local | grep {subfc r6,r5,r4}
 ; RUN: llc < %s -regalloc=local | grep {subfze r3,r3}
 ; The first argument of subfc must not be the same as any other register.
 

diff --git a/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll b/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll
index 5d09696933b5e67acca621b761e4fc041213598e..0fd949d950bdabbf43c335fe9018a16731535a1b 100644 (file)
--- a/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll
+++ b/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll
@@ -10,8 +10,8 @@ target triple = "powerpc-apple-darwin10.0"
 define void @foo(i32 %y) nounwind ssp {
 entry:
 ; CHECK: foo
-; CHECK: add r2
-; CHECK: 0(r2)
+; CHECK: add r4
+; CHECK: 0(r4)
   %y_addr = alloca i32                            ; <i32*> [#uses=2]
   %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
   store i32 %y, i32* %y_addr

diff --git a/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll b/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll
index 0f7acacbfac9d162d8d937b0503541b789db9db4..2c582a302a4a112066d54af2313cffe6c49e3fca 100644 (file)
--- a/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll
+++ b/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll
@@ -1,9 +1,9 @@
 ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin | \
-; RUN:   grep {stw r3, 32751}
+; RUN:   grep {stw r4, 32751}
 ; RUN: llc < %s -march=ppc64 -mtriple=powerpc-apple-darwin | \
-; RUN:   grep {stw r3, 32751}
+; RUN:   grep {stw r4, 32751}
 ; RUN: llc < %s -march=ppc64 -mtriple=powerpc-apple-darwin | \
-; RUN:   grep {std r2, 9024}
+; RUN:   grep {std r3, 9024}
 
 define void @test() {
        store i32 0, i32* inttoptr (i64 48725999 to i32*)

diff --git a/test/CodeGen/PowerPC/indirectbr.ll b/test/CodeGen/PowerPC/indirectbr.ll
index fbc7bd2264b630be2bb133236cb353f70abe84b3..2094e10a58796a6fa17972d87222daf5a65e3938 100644 (file)
--- a/test/CodeGen/PowerPC/indirectbr.ll
+++ b/test/CodeGen/PowerPC/indirectbr.ll
@@ -43,13 +43,13 @@ L2:                                               ; preds = %L3, %bb2
 
 L1:                                               ; preds = %L2, %bb2
   %res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ]  ; <i32> [#uses=1]
-; PIC: addis r4, r2, ha16(L_BA4__foo_L5-"L1$pb")
-; PIC: li r5, lo16(L_BA4__foo_L5-"L1$pb")
-; PIC: add r4, r4, r5
-; PIC: stw r4
-; STATIC: li r2, lo16(L_BA4__foo_L5)
-; STATIC: addis r2, r2, ha16(L_BA4__foo_L5)
-; STATIC: stw r2
+; PIC: addis r5, r4, ha16(L_BA4__foo_L5-"L1$pb")
+; PIC: li r6, lo16(L_BA4__foo_L5-"L1$pb")
+; PIC: add r5, r5, r6
+; PIC: stw r5
+; STATIC: li r4, lo16(L_BA4__foo_L5)
+; STATIC: addis r4, r4, ha16(L_BA4__foo_L5)
+; STATIC: stw r4
   store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4
   ret i32 %res.3
 }