ARM64: dts: rk3366: assigned parents for clk_32k

Change-Id: I1742823658aa46226e3112969d3eabc695921fb5
Signed-off-by: Feng Xiao <xf@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3366.dtsi b/arch/arm64/boot/dts/rockchip/rk3366.dtsi
index 06e6ea0004ef71d872cdc82851958339d72d6a1a..a9b6bc7551d523326ac81edcc05a90c7f545691e 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3366.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3366.dtsi
@@ -662,6 +662,7 @@
                #clock-cells = <1>;
                #reset-cells = <1>;
                assigned-clocks =
+                       <&cru SCLK_32K>,
                        <&cru DCLK_VOP_FULL>, <&cru DCLK_VOP_LITE>,
                        <&cru PLL_CPLL>, <&cru PLL_GPLL>,
                        <&cru PLL_NPLL>, <&cru PLL_MPLL>,
@@ -669,6 +670,7 @@
                        <&cru ACLK_VOP_FULL>, <&cru ACLK_VOP_LITE>,
                        <&cru HCLK_VOP_LITE>,<&cru HCLK_VOP_LITE>;
                assigned-clock-rates =
+                       <0>,
                        <0>, <0>,
                        <750000000>, <576000000>,
                        <594000000>, <594000000>,
@@ -676,6 +678,7 @@
                        <375000000>, <288000000>,
                        <100000000>, <100000000>;
                assigned-clock-parents =
+                       <&cru SCLK_32K_INTR>,
                        <&cru SCLK_MPLL_SRC>, <&cru PLL_NPLL>;
        };