R600/SI: Remove redundant setting expand on f64 vectors
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 12 Jan 2015 23:13:00 +0000 (23:13 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 12 Jan 2015 23:13:00 +0000 (23:13 +0000)
None of these are legal types already, so they default to
Expand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225728 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/R600/SIISelLowering.cpp

index 41f6d86443e7c4413ca6012dec7593a06658b1e5..2c961ff3efdbd0384b9d0f98f8d0fcf7f3af53c4 100644 (file)
@@ -203,13 +203,6 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) :
     }
   }
 
-  for (int I = MVT::v1f64; I <= MVT::v8f64; ++I) {
-    MVT::SimpleValueType VT = static_cast<MVT::SimpleValueType>(I);
-    setOperationAction(ISD::FTRUNC, VT, Expand);
-    setOperationAction(ISD::FCEIL, VT, Expand);
-    setOperationAction(ISD::FFLOOR, VT, Expand);
-  }
-
   if (Subtarget->getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS) {
     setOperationAction(ISD::FTRUNC, MVT::f64, Legal);
     setOperationAction(ISD::FCEIL, MVT::f64, Legal);