case X86II::AddRegFrm:
++FinalSize;
+ ++CurOp;
if (CurOp != NumOps) {
const MachineOperand &MO1 = MI.getOperand(CurOp++);
++FinalSize;
FinalSize += sizeRegModRMByte();
CurOp += 2;
- if (CurOp != NumOps)
+ if (CurOp != NumOps) {
+ ++CurOp;
FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc));
+ }
break;
}
case X86II::MRMDestMem: {
++FinalSize;
FinalSize += getMemModRMByteSize(MI, CurOp, IsPIC, Is64BitMode);
CurOp += 5;
- if (CurOp != NumOps)
+ if (CurOp != NumOps) {
+ ++CurOp;
FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc));
+ }
break;
}
++FinalSize;
FinalSize += sizeRegModRMByte();
CurOp += 2;
- if (CurOp != NumOps)
+ if (CurOp != NumOps) {
+ ++CurOp;
FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc));
+ }
break;
case X86II::MRMSrcMem: {
++FinalSize;
FinalSize += getMemModRMByteSize(MI, CurOp+1, IsPIC, Is64BitMode);
CurOp += 5;
- if (CurOp != NumOps)
+ if (CurOp != NumOps) {
+ ++CurOp;
FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc));
+ }
break;
}
case X86II::MRM4r: case X86II::MRM5r:
case X86II::MRM6r: case X86II::MRM7r:
++FinalSize;
+ ++CurOp;
FinalSize += sizeRegModRMByte();
if (CurOp != NumOps) {