Fix X86FastISel's output for x86-32 PIC constant pool addresses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56829 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp
index 96539b11fd8cdcd7f6e79de6d9f1662ce5889a20..74850da3d02d8b32445a278685bfa71aeff2866b 100644 (file)
--- a/lib/Target/X86/X86FastISel.cpp
+++ b/lib/Target/X86/X86FastISel.cpp
@@ -1217,9 +1217,18 @@ unsigned X86FastISel::TargetMaterializeConstant(Constant *C) {
     Align = Log2_64(Align);
   }
   
+  // x86-32 PIC requires a PIC base register for constant pools.
+  unsigned PICBase = 0;
+  if (TM.getRelocationModel() == Reloc::PIC_ &&
+      !Subtarget->is64Bit())
+    PICBase = getInstrInfo()->getGlobalBaseReg(&MF);
+
+  // Create the load from the constant pool.
   unsigned MCPOffset = MCP.getConstantPoolIndex(C, Align);
   unsigned ResultReg = createResultReg(RC);
-  addConstantPoolReference(BuildMI(MBB, TII.get(Opc), ResultReg), MCPOffset);
+  addConstantPoolReference(BuildMI(MBB, TII.get(Opc), ResultReg), MCPOffset,
+                           PICBase);
+
   return ResultReg;
 }
 

diff --git a/lib/Target/X86/X86InstrBuilder.h b/lib/Target/X86/X86InstrBuilder.h
index b5924cb76116671987322c440bc94c83787c1b4d..87c63421bc8905ba30a6c0416f5ae0cabfbc4b43 100644 (file)
--- a/lib/Target/X86/X86InstrBuilder.h
+++ b/lib/Target/X86/X86InstrBuilder.h
@@ -114,13 +114,15 @@ addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
 
 /// addConstantPoolReference - This function is used to add a reference to the
 /// base of a constant value spilled to the per-function constant pool.  The
-/// reference has base register ConstantPoolIndex offset which is retained until
-/// either machine code emission or assembly output.  This allows an optional
-/// offset to be added as well.
+/// reference uses the abstract ConstantPoolIndex which is retained until
+/// either machine code emission or assembly output. In PIC mode on x86-32,
+/// the GlobalBaseReg parameter can be used to make this a
+/// GlobalBaseReg-relative reference.
 ///
 inline const MachineInstrBuilder &
-addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI) {
-  return MIB.addReg(0).addImm(1).addReg(0).addConstantPoolIndex(CPI);
+addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
+                         unsigned GlobalBaseReg = 0) {
+  return MIB.addReg(GlobalBaseReg).addImm(1).addReg(0).addConstantPoolIndex(CPI);
 }
 
 } // End llvm namespace