Remove dead code. These ARM instruction definitions no longer exist.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127508 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/utils/TableGen/ARMDecoderEmitter.cpp b/utils/TableGen/ARMDecoderEmitter.cpp
index 67e2bafa8f956c5a95a8114f4daa5c27b5139939..4c081875eeb4fb2e39f81bdeeb0c0a32e51868b5 100644 (file)
--- a/utils/TableGen/ARMDecoderEmitter.cpp
+++ b/utils/TableGen/ARMDecoderEmitter.cpp
@@ -1600,15 +1600,6 @@ ARMDEBackend::populateInstruction(const CodeGenInstruction &CGI,
         Name == "FNEGDcc")
       return false;
 
-    // Ditto for VNEGDcc and VNEGScc.
-    if (Name == "VNEGDcc" || Name == "VNEGScc")
-      return false;
-
-    // LDMIA_RET is a special case of LDM (Load Multiple) where the registers
-    // loaded include the PC, causing a branch to a loaded address.  Ignore
-    // the LDMIA_RET instruction when decoding.
-    if (Name == "LDMIA_RET") return false;
-
     // Bcc is in a more generic form than B.  Ignore B when decoding.
     if (Name == "B") return false;