[msan] Propagate condition origin in select instruction.
authorEvgeniy Stepanov <eugeni.stepanov@gmail.com>
Thu, 21 Nov 2013 12:00:24 +0000 (12:00 +0000)
committerEvgeniy Stepanov <eugeni.stepanov@gmail.com>
Thu, 21 Nov 2013 12:00:24 +0000 (12:00 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195349 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Transforms/Instrumentation/MemorySanitizer.cpp
test/Instrumentation/MemorySanitizer/msan_basic.ll

index d547adc86e1b704d07ada4879d3f79c63aa8d8d1..f2e1ab7513ccc0ae3d6c650748d03acda3834287 100644 (file)
@@ -2082,13 +2082,20 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
       // Origins are always i32, so any vector conditions must be flattened.
       // FIXME: consider tracking vector origins for app vectors?
       Value *Cond = I.getCondition();
+      Value *CondShadow = getShadow(Cond);
       if (Cond->getType()->isVectorTy()) {
-        Value *ConvertedShadow = convertToShadowTyNoVec(Cond, IRB);
-        Cond = IRB.CreateICmpNE(ConvertedShadow,
-                                getCleanShadow(ConvertedShadow), "_mso_select");
+        Type *FlatTy = getShadowTyNoVec(Cond->getType());
+        Cond = IRB.CreateICmpNE(IRB.CreateBitCast(Cond, FlatTy),
+                                ConstantInt::getNullValue(FlatTy));
+        CondShadow = IRB.CreateICmpNE(IRB.CreateBitCast(CondShadow, FlatTy),
+                                      ConstantInt::getNullValue(FlatTy));
       }
-      setOrigin(&I, IRB.CreateSelect(Cond,
-                getOrigin(I.getTrueValue()), getOrigin(I.getFalseValue())));
+      // a = select b, c, d
+      // Oa = Sb ? Ob : (b ? Oc : Od)
+      setOrigin(&I, IRB.CreateSelect(
+                        CondShadow, getOrigin(I.getCondition()),
+                        IRB.CreateSelect(Cond, getOrigin(I.getTrueValue()),
+                                         getOrigin(I.getFalseValue()))));
     }
   }
 
index fceb3f007537af109fd1bdf4f973def430384895..ec756161ef405a4148d31c64e3c47c5330533cf0 100644 (file)
@@ -255,6 +255,7 @@ entry:
 ; CHECK-NEXT: select
 ; CHECK-ORIGINS: select
 ; CHECK-ORIGINS: select
+; CHECK: select
 ; CHECK: ret i32
 
 
@@ -274,6 +275,9 @@ entry:
 ; CHECK-NEXT: or <8 x i16>
 ; CHECK-ORIGINS: bitcast <8 x i1> {{.*}} to i8
 ; CHECK-ORIGINS: icmp ne i8 {{.*}}, 0
+; CHECK-ORIGINS: bitcast <8 x i1> {{.*}} to i8
+; CHECK-ORIGINS: icmp ne i8 {{.*}}, 0
+; CHECK-ORIGINS: select i1
 ; CHECK-ORIGINS: select i1
 ; CHECK: select <8 x i1>
 ; CHECK: ret <8 x i16>
@@ -295,6 +299,8 @@ entry:
 ; CHECK: sext i1 {{.*}} to i128
 ; CHECK: bitcast i128 {{.*}} to <8 x i16>
 ; CHECK: or <8 x i16>
+; CHECK-ORIGINS: select i1
+; CHECK-ORIGINS: select i1
 ; CHECK: select i1
 ; CHECK: ret <8 x i16>
 
@@ -309,6 +315,7 @@ entry:
 ; CHECK: select i1 {{.*}}, { i64, i64 }
 ; CHECK-NEXT: select i1 {{.*}}, { i64, i64 } { i64 -1, i64 -1 }, { i64, i64 }
 ; CHECK-ORIGINS: select i1
+; CHECK-ORIGINS: select i1
 ; CHECK-NEXT: select i1 {{.*}}, { i64, i64 }
 ; CHECK: ret { i64, i64 }