drm/radeon: consolidate redundant macros and constants
authorIlija Hadzic <ihadzic@research.bell-labs.com>
Wed, 2 Jan 2013 23:27:48 +0000 (18:27 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 31 Jan 2013 21:24:46 +0000 (16:24 -0500)
After refactoring the _cs logic, we ended up with many
macros and constants that #define the same thing.
Clean'em up.

Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
12 files changed:
drivers/gpu/drm/radeon/evergreen_cs.c
drivers/gpu/drm/radeon/evergreend.h
drivers/gpu/drm/radeon/nid.h
drivers/gpu/drm/radeon/r100.c
drivers/gpu/drm/radeon/r100d.h
drivers/gpu/drm/radeon/r300.c
drivers/gpu/drm/radeon/r300d.h
drivers/gpu/drm/radeon/r600_cs.c
drivers/gpu/drm/radeon/r600d.h
drivers/gpu/drm/radeon/rv515d.h
drivers/gpu/drm/radeon/si.c
drivers/gpu/drm/radeon/sid.h

index 211b509561534e43cfd4f16a37d8c00442e164ee..4a9760ab8774187f314aebaf624c2efc0fcd8485 100644 (file)
@@ -2639,12 +2639,12 @@ int evergreen_cs_parse(struct radeon_cs_parser *p)
                }
                p->idx += pkt.count + 2;
                switch (pkt.type) {
-               case PACKET_TYPE0:
+               case RADEON_PACKET_TYPE0:
                        r = evergreen_cs_parse_packet0(p, &pkt);
                        break;
-               case PACKET_TYPE2:
+               case RADEON_PACKET_TYPE2:
                        break;
-               case PACKET_TYPE3:
+               case RADEON_PACKET_TYPE3:
                        r = evergreen_packet3_check(p, &pkt);
                        break;
                default:
@@ -3395,19 +3395,19 @@ int evergreen_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib)
 
        do {
                pkt.idx = idx;
-               pkt.type = CP_PACKET_GET_TYPE(ib->ptr[idx]);
-               pkt.count = CP_PACKET_GET_COUNT(ib->ptr[idx]);
+               pkt.type = RADEON_CP_PACKET_GET_TYPE(ib->ptr[idx]);
+               pkt.count = RADEON_CP_PACKET_GET_COUNT(ib->ptr[idx]);
                pkt.one_reg_wr = 0;
                switch (pkt.type) {
-               case PACKET_TYPE0:
+               case RADEON_PACKET_TYPE0:
                        dev_err(rdev->dev, "Packet0 not allowed!\n");
                        ret = -EINVAL;
                        break;
-               case PACKET_TYPE2:
+               case RADEON_PACKET_TYPE2:
                        idx += 1;
                        break;
-               case PACKET_TYPE3:
-                       pkt.opcode = CP_PACKET3_GET_OPCODE(ib->ptr[idx]);
+               case RADEON_PACKET_TYPE3:
+                       pkt.opcode = RADEON_CP_PACKET3_GET_OPCODE(ib->ptr[idx]);
                        ret = evergreen_vm_packet3_check(rdev, ib->ptr, &pkt);
                        idx += pkt.count + 2;
                        break;
index 0bfd0e9e469b57ca395049ce1dfae500b67b3936..70388fe4ee59ac2a7644370f827f39b0a9589b58 100644 (file)
 /*
  * PM4
  */
-#define        PACKET_TYPE0    0
-#define        PACKET_TYPE1    1
-#define        PACKET_TYPE2    2
-#define        PACKET_TYPE3    3
-
-#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
-#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)
-#define CP_PACKET0_GET_REG(h) (((h) & 0xFFFF) << 2)
-#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)
-#define PACKET0(reg, n)        ((PACKET_TYPE0 << 30) |                         \
+#define PACKET0(reg, n)        ((RADEON_PACKET_TYPE0 << 30) |                  \
                         (((reg) >> 2) & 0xFFFF) |                      \
                         ((n) & 0x3FFF) << 16)
 #define CP_PACKET2                     0x80000000
 
 #define PACKET2(v)     (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))
 
-#define PACKET3(op, n) ((PACKET_TYPE3 << 30) |                         \
+#define PACKET3(op, n) ((RADEON_PACKET_TYPE3 << 30) |                  \
                         (((op) & 0xFF) << 8) |                         \
                         ((n) & 0x3FFF) << 16)
 
index 48e5022ee921d33081f86de17d8ab6b0520ea037..c4b84c5a9ab7cbaa92b5d7dfaf8c588ce5706505 100644 (file)
 /*
  * PM4
  */
-#define        PACKET_TYPE0    0
-#define        PACKET_TYPE1    1
-#define        PACKET_TYPE2    2
-#define        PACKET_TYPE3    3
-
-#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
-#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)
-#define CP_PACKET0_GET_REG(h) (((h) & 0xFFFF) << 2)
-#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)
-#define PACKET0(reg, n)        ((PACKET_TYPE0 << 30) |                         \
+#define PACKET0(reg, n)        ((RADEON_PACKET_TYPE0 << 30) |                  \
                         (((reg) >> 2) & 0xFFFF) |                      \
                         ((n) & 0x3FFF) << 16)
 #define CP_PACKET2                     0x80000000
 
 #define PACKET2(v)     (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))
 
-#define PACKET3(op, n) ((PACKET_TYPE3 << 30) |                         \
+#define PACKET3(op, n) ((RADEON_PACKET_TYPE3 << 30) |                  \
                         (((op) & 0xFF) << 8) |                         \
                         ((n) & 0x3FFF) << 16)
 
index 846960764a05e044b34585cc3aafcf6f944a8319..9db58530be37bdcb1c438a75a107f3c63ec6915d 100644 (file)
@@ -1410,7 +1410,7 @@ int r100_cs_packet_parse_vline(struct radeon_cs_parser *p)
 
        header = radeon_get_ib_value(p, h_idx);
        crtc_id = radeon_get_ib_value(p, h_idx + 5);
-       reg = CP_PACKET0_GET_REG(header);
+       reg = R100_CP_PACKET0_GET_REG(header);
        obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC);
        if (!obj) {
                DRM_ERROR("cannot find crtc %d\n", crtc_id);
@@ -1997,7 +1997,7 @@ int r100_cs_parse(struct radeon_cs_parser *p)
                }
                p->idx += pkt.count + 2;
                switch (pkt.type) {
-               case PACKET_TYPE0:
+               case RADEON_PACKET_TYPE0:
                        if (p->rdev->family >= CHIP_R200)
                                r = r100_cs_parse_packet0(p, &pkt,
                                        p->rdev->config.r100.reg_safe_bm,
@@ -2009,9 +2009,9 @@ int r100_cs_parse(struct radeon_cs_parser *p)
                                        p->rdev->config.r100.reg_safe_bm_size,
                                        &r100_packet0_check);
                        break;
-               case PACKET_TYPE2:
+               case RADEON_PACKET_TYPE2:
                        break;
-               case PACKET_TYPE3:
+               case RADEON_PACKET_TYPE3:
                        r = r100_packet3_check(p, &pkt);
                        break;
                default:
index eab91760fae00f9b957bf77ca8b6898b70890e15..f0f8ee69f4805ab37cc226168a9ea9d4309c989a 100644 (file)
                         REG_SET(PACKET3_IT_OPCODE, (op)) |             \
                         REG_SET(PACKET3_COUNT, (n)))
 
-#define        PACKET_TYPE0    0
-#define        PACKET_TYPE1    1
-#define        PACKET_TYPE2    2
-#define        PACKET_TYPE3    3
-
-#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
-#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)
-#define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2)
-#define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1)
-#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)
-
 /* Registers */
 #define R_0000F0_RBBM_SOFT_RESET                     0x0000F0
 #define   S_0000F0_SOFT_RESET_CP(x)                    (((x) & 0x1) << 0)
index 98f723c7ef667beb0ed441d5e6ac440bbeeb68fd..c60350e6872ddebdb5bc1bd923f6b2d4d6bc59fd 100644 (file)
@@ -1263,15 +1263,15 @@ int r300_cs_parse(struct radeon_cs_parser *p)
                }
                p->idx += pkt.count + 2;
                switch (pkt.type) {
-               case PACKET_TYPE0:
+               case RADEON_PACKET_TYPE0:
                        r = r100_cs_parse_packet0(p, &pkt,
                                                  p->rdev->config.r300.reg_safe_bm,
                                                  p->rdev->config.r300.reg_safe_bm_size,
                                                  &r300_packet0_check);
                        break;
-               case PACKET_TYPE2:
+               case RADEON_PACKET_TYPE2:
                        break;
-               case PACKET_TYPE3:
+               case RADEON_PACKET_TYPE3:
                        r = r300_packet3_check(p, &pkt);
                        break;
                default:
index 1f519a5ffb8c11d94adf2980445d90828e2ca88e..ff229a00d27379834645653f76b73f1051d468f0 100644 (file)
                         REG_SET(PACKET3_IT_OPCODE, (op)) |             \
                         REG_SET(PACKET3_COUNT, (n)))
 
-#define        PACKET_TYPE0    0
-#define        PACKET_TYPE1    1
-#define        PACKET_TYPE2    2
-#define        PACKET_TYPE3    3
-
-#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
-#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)
-#define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2)
-#define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1)
-#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)
-
 /* Registers */
 #define R_000148_MC_FB_LOCATION                      0x000148
 #define   S_000148_MC_FB_START(x)                      (((x) & 0xFFFF) << 0)
index f8fe50cb472617b0c1c30d57857014a6f142c446..0d210164cdbac18702be86ba5e1eb21a7378412f 100644 (file)
@@ -839,7 +839,7 @@ int r600_cs_common_vline_parse(struct radeon_cs_parser *p,
                return r;
 
        /* check its a WAIT_REG_MEM */
-       if (wait_reg_mem.type != PACKET_TYPE3 ||
+       if (wait_reg_mem.type != RADEON_PACKET_TYPE3 ||
            wait_reg_mem.opcode != PACKET3_WAIT_REG_MEM) {
                DRM_ERROR("vline wait missing WAIT_REG_MEM segment\n");
                return -EINVAL;
@@ -882,7 +882,7 @@ int r600_cs_common_vline_parse(struct radeon_cs_parser *p,
 
        header = radeon_get_ib_value(p, h_idx);
        crtc_id = radeon_get_ib_value(p, h_idx + 2 + 7 + 1);
-       reg = CP_PACKET0_GET_REG(header);
+       reg = R600_CP_PACKET0_GET_REG(header);
 
        obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC);
        if (!obj) {
@@ -2282,12 +2282,12 @@ int r600_cs_parse(struct radeon_cs_parser *p)
                }
                p->idx += pkt.count + 2;
                switch (pkt.type) {
-               case PACKET_TYPE0:
+               case RADEON_PACKET_TYPE0:
                        r = r600_cs_parse_packet0(p, &pkt);
                        break;
-               case PACKET_TYPE2:
+               case RADEON_PACKET_TYPE2:
                        break;
-               case PACKET_TYPE3:
+               case RADEON_PACKET_TYPE3:
                        r = r600_packet3_check(p, &pkt);
                        break;
                default:
index 4a53402b18522fcba0cffd69b0f645fac763571e..62423b0eb2b910a6e77066916bbbd89858577f48 100644 (file)
 /*
  * PM4
  */
-#define        PACKET_TYPE0    0
-#define        PACKET_TYPE1    1
-#define        PACKET_TYPE2    2
-#define        PACKET_TYPE3    3
-
-#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
-#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)
-#define CP_PACKET0_GET_REG(h) (((h) & 0xFFFF) << 2)
-#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)
-#define PACKET0(reg, n)        ((PACKET_TYPE0 << 30) |                         \
+#define PACKET0(reg, n)        ((RADEON_PACKET_TYPE0 << 30) |                  \
                         (((reg) >> 2) & 0xFFFF) |                      \
                         ((n) & 0x3FFF) << 16)
-#define PACKET3(op, n) ((PACKET_TYPE3 << 30) |                         \
+#define PACKET3(op, n) ((RADEON_PACKET_TYPE3 << 30) |                  \
                         (((op) & 0xFF) << 8) |                         \
                         ((n) & 0x3FFF) << 16)
 
index 590309a710b1f0bc8b69640e304de85b256402c3..6927a200daf44ebb410f52182db77727687b9ba1 100644 (file)
                         REG_SET(PACKET3_IT_OPCODE, (op)) |             \
                         REG_SET(PACKET3_COUNT, (n)))
 
-#define        PACKET_TYPE0    0
-#define        PACKET_TYPE1    1
-#define        PACKET_TYPE2    2
-#define        PACKET_TYPE3    3
-
-#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
-#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)
-#define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2)
-#define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1)
-#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)
-
 /* Registers */
 #define R_0000F0_RBBM_SOFT_RESET                     0x0000F0
 #define   S_0000F0_SOFT_RESET_CP(x)                    (((x) & 0x1) << 0)
index ae8b48205a6c10257de328c0b669628436e8b0a0..f06072f5e5dabf5a47836aa3e7d550fea88035a0 100644 (file)
@@ -2855,19 +2855,19 @@ int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib)
 
        do {
                pkt.idx = idx;
-               pkt.type = CP_PACKET_GET_TYPE(ib->ptr[idx]);
-               pkt.count = CP_PACKET_GET_COUNT(ib->ptr[idx]);
+               pkt.type = RADEON_CP_PACKET_GET_TYPE(ib->ptr[idx]);
+               pkt.count = RADEON_CP_PACKET_GET_COUNT(ib->ptr[idx]);
                pkt.one_reg_wr = 0;
                switch (pkt.type) {
-               case PACKET_TYPE0:
+               case RADEON_PACKET_TYPE0:
                        dev_err(rdev->dev, "Packet0 not allowed!\n");
                        ret = -EINVAL;
                        break;
-               case PACKET_TYPE2:
+               case RADEON_PACKET_TYPE2:
                        idx += 1;
                        break;
-               case PACKET_TYPE3:
-                       pkt.opcode = CP_PACKET3_GET_OPCODE(ib->ptr[idx]);
+               case RADEON_PACKET_TYPE3:
+                       pkt.opcode = RADEON_CP_PACKET3_GET_OPCODE(ib->ptr[idx]);
                        if (ib->is_const_ib)
                                ret = si_vm_packet3_ce_check(rdev, ib->ptr, &pkt);
                        else {
index c056aae814f090693a4eb445d83d3ca2be30efd7..76b5911585f1fe266ffcd964ee6694960106a567 100644 (file)
 /*
  * PM4
  */
-#define        PACKET_TYPE0    0
-#define        PACKET_TYPE1    1
-#define        PACKET_TYPE2    2
-#define        PACKET_TYPE3    3
-
-#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
-#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)
-#define CP_PACKET0_GET_REG(h) (((h) & 0xFFFF) << 2)
-#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)
-#define PACKET0(reg, n)        ((PACKET_TYPE0 << 30) |                         \
+#define PACKET0(reg, n)        ((RADEON_PACKET_TYPE0 << 30) |                  \
                         (((reg) >> 2) & 0xFFFF) |                      \
                         ((n) & 0x3FFF) << 16)
 #define CP_PACKET2                     0x80000000
 
 #define PACKET2(v)     (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))
 
-#define PACKET3(op, n) ((PACKET_TYPE3 << 30) |                         \
+#define PACKET3(op, n) ((RADEON_PACKET_TYPE3 << 30) |                  \
                         (((op) & 0xFF) << 8) |                         \
                         ((n) & 0x3FFF) << 16)