[media] s5p-mfc: Bug fix of timestamp/timecode copy mechanism
authorKamil Debski <k.debski@samsung.com>
Fri, 8 Jun 2012 07:46:38 +0000 (04:46 -0300)
committerMauro Carvalho Chehab <mchehab@redhat.com>
Mon, 18 Jun 2012 22:44:46 +0000 (19:44 -0300)
Fixed the code copying timecode/timestamp to corresponding
frames between OUTPUT and CAPTURE.

Signed-off-by: Kamil Debski <k.debski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
drivers/media/video/s5p-mfc/regs-mfc.h
drivers/media/video/s5p-mfc/s5p_mfc_opr.h

index 053a8a872fd743ca1f8e3cae687f827247b9453e..a19bece41ba9d0c4a53845943c8219e27659382b 100644 (file)
                                                                decoded pic */
 #define S5P_FIMV_SI_DISPLAY_Y_ADR      0x2010 /* luma addr of displayed pic */
 #define S5P_FIMV_SI_DISPLAY_C_ADR      0x2014 /* chroma addrof displayed pic */
+
 #define S5P_FIMV_SI_CONSUMED_BYTES     0x2018 /* Consumed number of bytes to
                                                        decode a frame */
 #define S5P_FIMV_SI_DISPLAY_STATUS     0x201c /* status of decoded picture */
 
+#define S5P_FIMV_SI_DECODE_Y_ADR       0x2024 /* luma addr of decoded pic */
+#define S5P_FIMV_SI_DECODE_C_ADR       0x2028 /* chroma addrof decoded pic */
+#define S5P_FIMV_SI_DECODE_STATUS      0x202c /* status of decoded picture */
+
 #define S5P_FIMV_SI_CH0_SB_ST_ADR      0x2044 /* start addr of stream buf */
 #define S5P_FIMV_SI_CH0_SB_FRM_SIZE    0x2048 /* size of stream buf */
 #define S5P_FIMV_SI_CH0_DESC_ADR       0x204c /* addr of descriptor buf */
index db83836e6a9fc05b98a11d1edf7a267c74b99b53..5932d1c782c5dba36e18b55a6a3dcf6cda9f77da 100644 (file)
@@ -57,10 +57,12 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
                                        S5P_FIMV_SI_DISPLAY_Y_ADR) << \
                                        MFC_OFFSET_SHIFT)
 #define s5p_mfc_get_dec_y_adr()                (readl(dev->regs_base + \
-                                       S5P_FIMV_SI_DISPLAY_Y_ADR) << \
+                                       S5P_FIMV_SI_DECODE_Y_ADR) << \
                                        MFC_OFFSET_SHIFT)
 #define s5p_mfc_get_dspl_status()      readl(dev->regs_base + \
                                                S5P_FIMV_SI_DISPLAY_STATUS)
+#define s5p_mfc_get_dec_status()       readl(dev->regs_base + \
+                                               S5P_FIMV_SI_DECODE_STATUS)
 #define s5p_mfc_get_frame_type()       (readl(dev->regs_base + \
                                                S5P_FIMV_DECODE_FRAME_TYPE) \
                                        & S5P_FIMV_DECODE_FRAME_MASK)