ARM expansion of pre-indexed store pseudos should maintain memoperands.

Partial fix for rdar://9945172.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137513 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index abec1aa50ef3128fb5574c725a604a18b09a2986..c6fc3237873c2df2be86155ec1672692a4e2974d 100644 (file)
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -5300,13 +5300,15 @@ ARMTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
     if (isSub)
       Offset = -Offset;
 
+    MachineMemOperand *MMO = *MI->memoperands_begin();
     MachineInstrBuilder MIB = BuildMI(*BB, MI, dl, TII->get(NewOpc))
       .addOperand(MI->getOperand(0))  // Rn_wb
       .addOperand(MI->getOperand(1))  // Rt
       .addOperand(MI->getOperand(2))  // Rn
       .addImm(Offset)                 // offset (skip GPR==zero_reg)
       .addOperand(MI->getOperand(5))  // pred
-      .addOperand(MI->getOperand(6));
+      .addOperand(MI->getOperand(6))
+      .addMemOperand(MMO);
     MI->eraseFromParent();
     return BB;
   }