rockchip: gpu: add /sys/rk_gpu/error_count
authorSimon <xxm@rock-chips.com>
Thu, 9 Oct 2014 01:58:14 +0000 (09:58 +0800)
committerSimon <xxm@rock-chips.com>
Thu, 9 Oct 2014 02:02:43 +0000 (10:02 +0800)
Note: these add node "error_count" for rk3036/rk312x/rk3288
  gpu error auto detect,if cat /sys/rk_gpu/error_count return
  > 1,means gpu work unnormal currently

drivers/gpu/arm/mali400/mali/platform/rk30/mali_platform.c
drivers/gpu/arm/midgard/mali_kbase_defs.h
drivers/gpu/arm/midgard/mali_kbase_device.c
drivers/gpu/arm/midgard/mali_kbase_jm.c
drivers/gpu/arm/midgard/mali_kbase_mmu.c
drivers/gpu/arm/midgard/platform/rk/mali_kbase_platform.c

index 12c7d4ddfb21e6508fdc8baeadf3a9b696edea1d..3cfd76dde17b49032e01716252c91ec90689381c 100755 (executable)
@@ -106,6 +106,8 @@ void mali_clk_set_rate(struct dvfs_node *clk, u32 value)
 }
 
 static struct kobject *mali400_utility_object;
+static struct kobject *rk_gpu;
+
 static u32 get_mali_dvfs_status(void)
 {
        return maliDvfsStatus.currentStep;
@@ -209,6 +211,9 @@ static mali_bool mali400_utility_sysfs_init(void)
        if (mali400_utility_object == NULL) {
                return -1;
        }
+       rk_gpu = kobject_create_and_add("rk_gpu", NULL);
+       if (!rk_gpu)
+               return -1;
        ret = sysfs_create_file(mali400_utility_object, &dev_attr_utility.attr);
        if (ret) {
                return -1;
@@ -219,9 +224,9 @@ static mali_bool mali400_utility_sysfs_init(void)
        }
        ret = sysfs_create_file(mali400_utility_object, &dev_attr_sampling_timeout.attr);
        if(ret){
-               return -1;      
+               return -1;
        }
-       ret = sysfs_create_file(mali400_utility_object, &dev_attr_error_count.attr);
+       ret = sysfs_create_file(rk_gpu, &dev_attr_error_count.attr);
        if(ret){
                return -1;
        }
index ebf28dca73860f90a941a506116b2e3b8c14abe2..e01d01aa9d9e5fa745eef62ca1bb886d4fd0a460 100755 (executable)
@@ -642,6 +642,7 @@ struct kbase_device {
 
        struct list_head entry;
        struct device *dev;
+       unsigned int kbase_group_error;
        struct miscdevice mdev;
        u64 reg_start;
        size_t reg_size;
index 6dfff10f0dbbec851dd6354406240fb69d6fef8b..1d69de4f77061c560fd8875430966426f5077e90 100755 (executable)
@@ -359,6 +359,7 @@ void kbase_report_gpu_fault(kbase_device *kbdev, int multiple)
        address |= kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_FAULTADDRESS_LO), NULL);
 
        dev_warn(kbdev->dev, "GPU Fault 0x%08x (%s) at 0x%016llx", status & 0xFF, kbase_exception_name(status), address);
+       kbdev->kbase_group_error++;
        if (multiple)
                dev_warn(kbdev->dev, "There were multiple GPU faults - some have not been reported\n");
 }
index d3c66431e3f3d2c14c6dfedf47fe24a8966d947b..f2767770656b4de6319243ef8cc9235fc49ab003 100755 (executable)
@@ -357,6 +357,7 @@ void kbase_job_done(kbase_device *kbdev, u32 done)
                                        /* fall throught */
                                default:
                                        dev_warn(kbdev->dev, "error detected from slot %d, job status 0x%08x (%s)", i, completion_code, kbase_exception_name(completion_code));
+                               kbdev->kbase_group_error++;
                                }
                        }
 
index 17e4e08b68ff906ed6f0ded1fa5867114f2c01fa..5bfc8a2ffdc6928194a779fd394b8bc39ab21f29 100755 (executable)
@@ -1308,7 +1308,7 @@ void kbase_mmu_interrupt(kbase_device *kbdev, u32 irq_stat)
 
                /* remove the queued PFs from the mask */
                new_mask &= ~((1UL << as_no) | (1UL << (as_no + num_as)));
-
+               kbdev->kbase_group_error++;
                /* queue work pending for this AS */
                KBASE_DEBUG_ASSERT(0 == object_is_on_stack(&as->work_pagefault));
                INIT_WORK(&as->work_pagefault, page_fault_worker);
index 0b1349876137f70dc527e1b55e7b23db5fb16bfc..7ea3f2832da48e96a304fa96eaff231db0619cf7 100755 (executable)
@@ -49,6 +49,9 @@
 static int mali_clk_status = 0;
 static int mali_pd_status = 0;
 
+u32 kbase_group_error = 0;
+static struct kobject *rk_gpu;
+
 int mali_dvfs_clk_set(struct dvfs_node *node,unsigned long rate)
 {
        int ret = 0;
@@ -258,6 +261,16 @@ int kbase_platform_cmu_pmu_control(struct kbase_device *kbdev, int control)
        return 0;
 }
 
+static ssize_t error_count_show(struct device *dev,struct device_attribute *attr, char *buf)
+{
+       struct kbase_device *kbdev = dev_get_drvdata(dev);
+       ssize_t ret;
+
+       ret = scnprintf(buf, PAGE_SIZE, "%d\n", kbdev->kbase_group_error);
+       return ret;
+}
+static DEVICE_ATTR(error_count, S_IRUGO, error_count_show, NULL);
+
 #ifdef CONFIG_MALI_MIDGARD_DEBUG_SYS
 static ssize_t show_clock(struct device *dev, struct device_attribute *attr, char *buf)
 {
@@ -868,6 +881,7 @@ void kbase_platform_remove_sysfs_file(struct device *dev)
 mali_error kbase_platform_init(struct kbase_device *kbdev)
 {
        struct rk_context *platform;
+       int ret;
 
        platform = kmalloc(sizeof(struct rk_context), GFP_KERNEL);
 
@@ -885,6 +899,14 @@ mali_error kbase_platform_init(struct kbase_device *kbdev)
        platform->dvfs_enabled = true;
 #endif
 
+       rk_gpu = kobject_create_and_add("rk_gpu", NULL);
+       if (!rk_gpu)
+               return MALI_ERROR_FUNCTION_FAILED;
+
+       ret = sysfs_create_file(rk_gpu, &dev_attr_error_count.attr);
+       if(ret)
+               return MALI_ERROR_FUNCTION_FAILED;
+
        spin_lock_init(&platform->cmu_pmu_lock);
 
        if (kbase_platform_power_clock_init(kbdev))