rk3036 hdmi: when vop output yuv and hdmi output rgb,open hdmi CSC func
authorhjc <hjc@rock-chips.com>
Thu, 4 Sep 2014 03:51:41 +0000 (11:51 +0800)
committerhjc <hjc@rock-chips.com>
Thu, 4 Sep 2014 06:52:49 +0000 (14:52 +0800)
drivers/video/rockchip/hdmi/chips/rk3036/rk3036_hdmi_hw.c
drivers/video/rockchip/hdmi/chips/rk3036/rk3036_hdmi_hw.h

index ca6c99ee31fc223ca32ebe58be8d063281e744fb..ddab251495b319a9eec1a0285b3527fab2bb4821 100755 (executable)
@@ -289,10 +289,10 @@ static int rk3036_hdmi_config_video(struct hdmi *hdmi_drv,
                vpara->output_color = VIDEO_OUTPUT_RGB444;/*rk3036 vop only can output rgb fmt*/
        } else if (hdmi_drv->data->soc_type == HDMI_SOC_RK312X) {
                /* rk3128 vop can output yuv444 fmt */
-               if (vpara->input_color == VIDEO_INPUT_COLOR_YCBCR444)
+               /*if (vpara->input_color == VIDEO_INPUT_COLOR_YCBCR444)
                        vpara->output_color = VIDEO_OUTPUT_YCBCR444;
                else
-                       vpara->output_color = VIDEO_OUTPUT_RGB444;
+                       vpara->output_color = VIDEO_OUTPUT_RGB444;*/
        }
 
        if (hdmi_drv->pwr_mode == LOWER_PWR)
@@ -308,16 +308,23 @@ static int rk3036_hdmi_config_video(struct hdmi *hdmi_drv,
        hdmi_writel(hdmi_dev, VIDEO_CONTRL2,
                    v_VIDEO_INPUT_BITS(VIDEO_INPUT_8BITS) |
                    v_VIDEO_OUTPUT_FORMAT(vpara->output_color & 0xFF));
+       hdmi_writel(hdmi_dev, VIDEO_CONTRL2,
+                   v_VIDEO_INPUT_CSP(vpara->input_color && 0x1));
 
        /* Set HDMI Mode */
        hdmi_writel(hdmi_dev, HDCP_CTRL, v_HDMI_DVI(vpara->output_mode));
 
        /* Enable or disalbe color space convert */
-       if (vpara->input_color != vpara->output_color)
+       if (vpara->input_color != vpara->output_color) {
                value = v_SOF_DISABLE | v_CSC_ENABLE;
-       else
+               hdmi_writel(hdmi_dev, VIDEO_CONTRL3, value);
+               hdmi_msk_reg(hdmi_dev, VIDEO_CONTRL, m_VIDEO_AUTO_CSC, v_VIDEO_AUTO_CSC(1));
+       } else {
                value = v_SOF_DISABLE;
-       hdmi_writel(hdmi_dev, VIDEO_CONTRL3, value);
+               hdmi_writel(hdmi_dev, VIDEO_CONTRL3, value);
+               hdmi_msk_reg(hdmi_dev, VIDEO_CONTRL, m_VIDEO_AUTO_CSC, v_VIDEO_AUTO_CSC(0));
+       }
+
 
        /* Set ext video timing */
 #if 1
index d19c1805689c06e264a984977133727d1677fd9f..d58ba69ec2b26d8de458e9375f0898f889e63ce5 100755 (executable)
@@ -63,13 +63,21 @@ enum {
 #define VIDEO_CONTRL2                  0x02
 #define m_VIDEO_OUTPUT_FORMAT  (3 << 6)
 #define m_VIDEO_INPUT_BITS     (3 << 4)
+#define m_VIDEO_INPUT_CSP      (1 << 0)
 #define v_VIDEO_OUTPUT_FORMAT(n)(n << 6)
 #define v_VIDEO_INPUT_BITS(n)  (n << 4)
+#define v_VIDEO_INPUT_CSP(n)   (n << 0)
+
 enum {
        VIDEO_INPUT_12BITS = 0,
        VIDEO_INPUT_10BITS,
+       VIDEO_INPUT_REVERT,
        VIDEO_INPUT_8BITS
 };
+#define VIDEO_CONTRL                   0x03
+#define m_VIDEO_AUTO_CSC       (1 << 7)
+#define v_VIDEO_AUTO_CSC(n)    (n << 7)
+
 #define VIDEO_CONTRL3                  0x04
 #define m_SOF                  (1 << 3)
 #define m_CSC                  (1 << 0)