\r
/* set bu92725guw registers */\r
/* [Modify] AIC 2011/09/27\r
- * MS_EN(TRCR5)¤Ë¤è¤ëͨÐÅ¥â©`¥ÉÇÐÌæ„Ó×÷¤òÐФï¤Ê¤¤¤è¤¦¤ËÐÞÕý¤·¤Þ¤·¤¿¡£\r
*\r
* internal_set(1);\r
*/\r
break;\r
\r
case BU92725GUW_FIR_REV: /* FIR use */\r
- val = REG_INT_STFRX | REG_INT_TO | REG_INT_CRC | REG_INT_OE | REG_INT_EOF \r
+ val = REG_INT_STFRX | REG_INT_TO | REG_INT_CRC | REG_INT_OE | REG_INT_EOF \\r
| REG_INT_AC | REG_INT_DECE; //IER1,2, 4, 5, 6, 7\r
break;\r
\r
case BU92725GUW_MULTI_REV: /* not used */\r
- val = REG_INT_STFRX | REG_INT_TO | REG_INT_CRC | REG_INT_OE | REG_INT_EOF | REG_INT_AC | REG_INT_DECE \r
+ val = REG_INT_STFRX | REG_INT_TO | REG_INT_CRC | REG_INT_OE | REG_INT_EOF | REG_INT_AC | REG_INT_DECE \\r
| REG_INT_RDOE | REG_INT_DEX | REG_INT_RDUE; //IER1,2, 4, 5, 6, 7, 8, 9, 10\r
break;\r
\r
case BU92725GUW_AUTO_MULTI_REV: /* M/FIR use */\r
- val = REG_INT_TO | REG_INT_CRC | REG_INT_OE | REG_INT_EOF | REG_INT_AC | REG_INT_DECE \r
+ val = REG_INT_TO | REG_INT_CRC | REG_INT_OE | REG_INT_EOF | REG_INT_AC | REG_INT_DECE\\r
| REG_INT_RDOE | REG_INT_DEX | REG_INT_RDE; //IER2, 4, 5, 6, 7, 8, 9, 12\r
break;\r
\r
printk("IER: 0x%x\n", BU92725GUW_READ_REG(REG_IER_ADDR));\r
}\r
\r
-\r
+/* [Add] AIC 2011/09/29 */\r
+int BU92725GUW_get_length_in_fifo_buffer(void)\r
+{\r
+ return( (int)BU92725GUW_READ_REG(REG_FLV_ADDR) );\r
+}\r
+/* [Add-end] AIC 2011/09/29 */\r
}\r
\r
/* [Modify] AIC 2011/09/27\r
- * ËÍÐťХåե¡¤«¤é¥Ç©`¥¿¤òÈ¡¤ê³ö¤¹·½·¨¤Ë\86\96î}¤¬¤¢¤ê¡¢Ò»²¿¤Î\r
- * ¥Ç©`¥¿¤¬Õý¤·¤¯Ëͤì¤Ê¤¤¤³¤È¤¬¤¢¤ë¤¿¤á¤Ë¡¢ËÍÐťǩ`¥¿¤Î\r
- * È¡µÃ·½·¨¤òÐÞÕý¤·¤Þ¤·¤¿¡£\r
- *\r
* BU92725GUW_send_data(xmit->buf+xmit->tail, len, NULL, 0);\r
*/\r
if ( (xmit->tail + len) > UART_XMIT_SIZE ) {\r
}\r
\r
if (irq_src & (REG_INT_DRX | FRM_EVT_RX_EOFRX | FRM_EVT_RX_RDE)) {\r
+ //fixing CA001 (IrSimple mode sending) failing issue\r
+ /* modified to process a frame ending processing first, when RDE_EI and EOF_EI are happen at the same time.\r
+ * Before the modification, disconnect packet was processed as the previous packet,\r
+ * not as a disconnect packet. The packets were combined.\r
+ */\r
+ if ((irq_src & REG_INT_EOF) && (s->port.state->port.tty != NULL)) {\r
+ tty_flip_buffer_push(s->port.state->port.tty);\r
+ if (IS_FIR(s)) {\r
+ spin_lock(&s->data_lock);\r
+ if (add_frame_length(f, s->cur_frame_length) == 0) {\r
+ s->cur_frame_length = 0;\r
+ }\r
+ else {\r
+ printk("func %s,line %d: FIR frame length buf full......\n", __FUNCTION__, __LINE__); \r
+ }\r
+ spin_unlock(&s->data_lock);\r
+ }\r
+ }\r
+ //~ \r
+\r
len = bu92747_irda_do_rx(s);\r
if (!IS_FIR(s))\r
tty_flip_buffer_push(s->port.state->port.tty);\r
}\r
\r
if ((irq_src & REG_INT_EOF) && (s->port.state->port.tty != NULL)) {\r
+ spin_lock(&s->data_lock); // [Modify] AIC 2011/09/30 \r
tty_flip_buffer_push(s->port.state->port.tty);\r
if (IS_FIR(s)) {\r
- spin_lock(&s->data_lock);\r
+ /* [Modify] AIC 2011/09/30\r
+ * spin_lock(&s->data_lock);\r
+ */\r
if (add_frame_length(f, s->cur_frame_length) == 0) {\r
s->cur_frame_length = 0;\r
}\r
else {\r
printk("func %s,line %d: FIR frame length buf full......\n", __FUNCTION__, __LINE__); \r
}\r
- spin_unlock(&s->data_lock);\r
+ /* [Modify] AIC 2011/09/30 \r
+ * spin_unlock(&s->data_lock);\r
+ */\r
}\r
+ spin_unlock(&s->data_lock); // [Modify] AIC 2011/09/30\r
}\r
\r
/* [Modify] AIC 2011/09/27\r
- * WRE_EI(EIR11)¸î¤êÞz¤ß¤Î\95rµã¤Ç¡¢ËÍÐÅ¥â©`¥É¤«¤éÊÜÐÅ¥â©`¥É¤Ø\r
- * ÇФêÌ椨¤Æ¤·¤Þ¤¦¤È¡¢ËÍÐťǩ`¥¿¤Î×îáá¤Î²¿·Ö¤¬ËÍÐŤµ¤ì¤Ê¤¤¤³¤È¤¬\r
- * ¤¢¤ë¤¿¤á¡¢ËÍÐÅÍêÁ˸î¤êÞz¤ß(TXE_EI:EIR3)¤ò´ý¤Ä¤è¤¦¤ËÐÞÕý¤·¤Þ¤·¤¿¡£\r
*\r
* if (irq_src & (FRM_EVT_TX_TXE | FRM_EVT_TX_WRE)) {\r
* s->tx_empty = 1;\r
* irda_hw_set_moderx();\r
* }\r
*/\r
- if (irq_src & (FRM_EVT_TX_TXE | FRM_EVT_TX_WRE)) {\r
- /* ËÍÐŤ¬¾A¤¯\88öºÏ¤Ï¡¢¤³¤³¤Ç´Î¤Î¥Ç©`¥¿¤¬ËÍÐÅ¿ÉÄܤȤʤë */\r
+ /* [Modify] AIC 2011/09/29\r
+ * \r
+ * if (irq_src & (FRM_EVT_TX_TXE | FRM_EVT_TX_WRE)) {\r
+ * s->tx_empty = 1;\r
+ * if ( irq_src & FRM_EVT_TX_TXE ) {\r
+ * irda_hw_set_moderx();\r
+ * }\r
+ */\r
+ if ( (irq_src & (FRM_EVT_TX_TXE | FRM_EVT_TX_WRE)) &&\r
+ (BU92725GUW_get_length_in_fifo_buffer() == 0) ) {\r
s->tx_empty = 1;\r
- if (irq_src & FRM_EVT_TX_TXE) {\r
- /* ÍêÈ«¤ËËÍÐÅÍêÁˤȤʤä¿\88öºÏ¡¢ÊÜÐÅ¥â©`¥É¤ØÇФêÌ椨¤ë */\r
+\r
+ if ( irq_src & FRM_EVT_TX_TXE ) {\r
irda_hw_set_moderx();\r
}\r
}\r
- /* [Modify-end] AIC 2011/09/27 */\r
+ /* [Modify-end] AIC 2011/09/29 */\r
#if 0\r
/* error */\r
if (irq_src & REG_INT_TO) {\r