drm/i915: Wait for pending page flips before enabling/disabling the primary plane
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 21 May 2014 11:04:46 +0000 (14:04 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 22 May 2014 13:06:33 +0000 (15:06 +0200)
We have to write to the primary plane base address registrer when we
enable/disable the primary plane in response to sprite coverage. Those
writes will cause the flip counter to increment which could interfere
with the detection of CS flip completion. We could end up completing
CS flips before the CS has even executed the commands from the ring.

To avoid such issues, wait for CS flips to finish before we toggle the
primary plane on/off.

v2: Rebased due to atomic sprite update changes

Testcase: igt/kms_mmio_vs_cs_flip/setplane_vs_cs_flip
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_sprite.c

index dd157add7492f14a1b0d476b510a7d81a2967e48..d53758723ac477f10a4c84f6c513fbb7230f946e 100644 (file)
@@ -3291,7 +3291,7 @@ bool intel_has_pending_fb_unpin(struct drm_device *dev)
        return false;
 }
 
-static void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc)
+void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc)
 {
        struct drm_device *dev = crtc->dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
index fe2533ba52a9d78a03a6d2f775421acff87326a6..287b89e97456ae93b6a6e205538b279d4d169565 100644 (file)
@@ -802,6 +802,8 @@ int valleyview_get_vco(struct drm_i915_private *dev_priv);
 void intel_mode_from_pipe_config(struct drm_display_mode *mode,
                                 struct intel_crtc_config *pipe_config);
 int intel_format_to_fourcc(int format);
+void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc);
+
 
 /* intel_dp.c */
 void intel_dp_init(struct drm_device *dev, int output_reg, enum port port);
index 7780f6ce73ec2c8dc667d200325910c7161aa1d9..d6acd6bd0bf02bc09166f27065de21f333101e0a 100644 (file)
@@ -1018,6 +1018,9 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
 
                intel_crtc->primary_enabled = primary_enabled;
 
+               if (primary_was_enabled != primary_enabled)
+                       intel_crtc_wait_for_pending_flips(crtc);
+
                if (primary_was_enabled && !primary_enabled)
                        intel_pre_disable_primary(crtc);