Merge branch 'for-3.2' into for-3.3
authorMark Brown <broonie@opensource.wolfsonmicro.com>
Tue, 8 Nov 2011 01:17:30 +0000 (01:17 +0000)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Tue, 8 Nov 2011 01:17:30 +0000 (01:17 +0000)
Conflicts:
sound/soc/codecs/wm8940.c

1  2 
sound/soc/codecs/tlv320aic3x.c
sound/soc/codecs/wm8904.c
sound/soc/codecs/wm8940.c
sound/soc/codecs/wm8962.c

index a77f6ea471984a574f0ff554feed1839dd276589,87d5ef188e29484fe303931c71cc45ac30005cce..14cb5534ce8b7749cbe2d5b27bf461997e501d45
@@@ -833,6 -833,7 +833,6 @@@ static int aic3x_hw_params(struct snd_p
        int codec_clk = 0, bypass_pll = 0, fsref, last_clk = 0;
        u8 data, j, r, p, pll_q, pll_p = 1, pll_r = 1, pll_j = 1;
        u16 d, pll_d = 1;
 -      u8 reg;
        int clk;
  
        /* select data word length */
                snd_soc_write(codec, AIC3X_PLL_PROGA_REG, pll_q << PLLQ_SHIFT);
                snd_soc_write(codec, AIC3X_GPIOB_REG, CODEC_CLKIN_CLKDIV);
                /* disable PLL if it is bypassed */
 -              reg = snd_soc_read(codec, AIC3X_PLL_PROGA_REG);
 -              snd_soc_write(codec, AIC3X_PLL_PROGA_REG, reg & ~PLL_ENABLE);
 +              snd_soc_update_bits(codec, AIC3X_PLL_PROGA_REG, PLL_ENABLE, 0);
  
        } else {
                snd_soc_write(codec, AIC3X_GPIOB_REG, CODEC_CLKIN_PLLDIV);
                /* enable PLL when it is used */
 -              reg = snd_soc_read(codec, AIC3X_PLL_PROGA_REG);
 -              snd_soc_write(codec, AIC3X_PLL_PROGA_REG, reg | PLL_ENABLE);
 +              snd_soc_update_bits(codec, AIC3X_PLL_PROGA_REG,
 +                                  PLL_ENABLE, PLL_ENABLE);
        }
  
        /* Route Left DAC to left channel input and
@@@ -1021,6 -1023,7 +1021,7 @@@ static int aic3x_set_dai_fmt(struct snd
                break;
        case SND_SOC_DAIFMT_CBS_CFS:
                aic3x->master = 0;
+               iface_areg &= ~(BIT_CLK_MASTER | WORD_CLK_MASTER);
                break;
        default:
                return -EINVAL;
@@@ -1153,6 -1156,7 +1154,6 @@@ static int aic3x_set_bias_level(struct 
                                enum snd_soc_bias_level level)
  {
        struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
 -      u8 reg;
  
        switch (level) {
        case SND_SOC_BIAS_ON:
                if (codec->dapm.bias_level == SND_SOC_BIAS_STANDBY &&
                    aic3x->master) {
                        /* enable pll */
 -                      reg = snd_soc_read(codec, AIC3X_PLL_PROGA_REG);
 -                      snd_soc_write(codec, AIC3X_PLL_PROGA_REG,
 -                                    reg | PLL_ENABLE);
 +                      snd_soc_update_bits(codec, AIC3X_PLL_PROGA_REG,
 +                                          PLL_ENABLE, PLL_ENABLE);
                }
                break;
        case SND_SOC_BIAS_STANDBY:
                if (codec->dapm.bias_level == SND_SOC_BIAS_PREPARE &&
                    aic3x->master) {
                        /* disable pll */
 -                      reg = snd_soc_read(codec, AIC3X_PLL_PROGA_REG);
 -                      snd_soc_write(codec, AIC3X_PLL_PROGA_REG,
 -                                    reg & ~PLL_ENABLE);
 +                      snd_soc_update_bits(codec, AIC3X_PLL_PROGA_REG,
 +                                          PLL_ENABLE, 0);
                }
                break;
        case SND_SOC_BIAS_OFF:
@@@ -1289,6 -1295,7 +1290,6 @@@ static int aic3x_resume(struct snd_soc_
  static int aic3x_init(struct snd_soc_codec *codec)
  {
        struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
 -      int reg;
  
        snd_soc_write(codec, AIC3X_PAGE_SELECT, PAGE0_SELECT);
        snd_soc_write(codec, AIC3X_RESET, SOFT_RESET);
        snd_soc_write(codec, DACR1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON);
  
        /* unmute all outputs */
 -      reg = snd_soc_read(codec, LLOPM_CTRL);
 -      snd_soc_write(codec, LLOPM_CTRL, reg | UNMUTE);
 -      reg = snd_soc_read(codec, RLOPM_CTRL);
 -      snd_soc_write(codec, RLOPM_CTRL, reg | UNMUTE);
 -      reg = snd_soc_read(codec, MONOLOPM_CTRL);
 -      snd_soc_write(codec, MONOLOPM_CTRL, reg | UNMUTE);
 -      reg = snd_soc_read(codec, HPLOUT_CTRL);
 -      snd_soc_write(codec, HPLOUT_CTRL, reg | UNMUTE);
 -      reg = snd_soc_read(codec, HPROUT_CTRL);
 -      snd_soc_write(codec, HPROUT_CTRL, reg | UNMUTE);
 -      reg = snd_soc_read(codec, HPLCOM_CTRL);
 -      snd_soc_write(codec, HPLCOM_CTRL, reg | UNMUTE);
 -      reg = snd_soc_read(codec, HPRCOM_CTRL);
 -      snd_soc_write(codec, HPRCOM_CTRL, reg | UNMUTE);
 +      snd_soc_update_bits(codec, LLOPM_CTRL, UNMUTE, UNMUTE);
 +      snd_soc_update_bits(codec, RLOPM_CTRL, UNMUTE, UNMUTE);
 +      snd_soc_update_bits(codec, MONOLOPM_CTRL, UNMUTE, UNMUTE);
 +      snd_soc_update_bits(codec, HPLOUT_CTRL, UNMUTE, UNMUTE);
 +      snd_soc_update_bits(codec, HPROUT_CTRL, UNMUTE, UNMUTE);
 +      snd_soc_update_bits(codec, HPLCOM_CTRL, UNMUTE, UNMUTE);
 +      snd_soc_update_bits(codec, HPRCOM_CTRL, UNMUTE, UNMUTE);
  
        /* ADC default volume and unmute */
        snd_soc_write(codec, LADC_VOL, DEFAULT_GAIN);
index bf325bb12d77121f0377f6252d711e04cf26c2ce,285ef87e6704fd655d89170ce5e5307e25a36983..bb070f835257ed5c43ea3bfb109d3624423690d0
@@@ -867,7 -867,7 +867,7 @@@ SOC_ENUM("Right Capture Mode", rin_mode
  SOC_DOUBLE_R("Capture Volume", WM8904_ANALOGUE_LEFT_INPUT_0,
             WM8904_ANALOGUE_RIGHT_INPUT_0, 0, 31, 0),
  SOC_DOUBLE_R("Capture Switch", WM8904_ANALOGUE_LEFT_INPUT_0,
-            WM8904_ANALOGUE_RIGHT_INPUT_0, 7, 1, 0),
+            WM8904_ANALOGUE_RIGHT_INPUT_0, 7, 1, 1),
  
  SOC_SINGLE("High Pass Filter Switch", WM8904_ADC_DIGITAL_0, 4, 1, 0),
  SOC_ENUM("High Pass Filter Mode", hpf_mode),
@@@ -1196,7 -1196,7 +1196,7 @@@ SND_SOC_DAPM_INPUT("IN2R")
  SND_SOC_DAPM_INPUT("IN3L"),
  SND_SOC_DAPM_INPUT("IN3R"),
  
 -SND_SOC_DAPM_MICBIAS("MICBIAS", WM8904_MIC_BIAS_CONTROL_0, 0, 0),
 +SND_SOC_DAPM_SUPPLY("MICBIAS", WM8904_MIC_BIAS_CONTROL_0, 0, 0, NULL, 0),
  
  SND_SOC_DAPM_MUX("Left Capture Mux", SND_SOC_NOPM, 0, 0, &lin_mux),
  SND_SOC_DAPM_MUX("Left Capture Inverting Mux", SND_SOC_NOPM, 0, 0,
index fec3892b234c7d0aebc5921afba7fc8d38d06ff6,de9ec9b8b7d9ae06e98bd58f01e28ff67b08f0e1..1b5856b4ea7c0a350c552abb9eb32f63063be268
@@@ -488,6 -488,8 +488,8 @@@ static int wm8940_set_bias_level(struc
                break;
        }
  
+       codec->dapm.bias_level = level;
        return ret;
  }
  
@@@ -619,7 -621,7 +621,7 @@@ static int wm8940_set_dai_clkdiv(struc
  
        switch (div_id) {
        case WM8940_BCLKDIV:
-               reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFEF3;
+               reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFFE3;
                ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 2));
                break;
        case WM8940_MCLKDIV:
                ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 5));
                break;
        case WM8940_OPCLKDIV:
 -              reg = snd_soc_read(codec, WM8940_ADDCNTRL) & 0xFFCF;
 -              ret = snd_soc_write(codec, WM8940_ADDCNTRL, reg | (div << 4));
 +              reg = snd_soc_read(codec, WM8940_GPIO) & 0xFFCF;
 +              ret = snd_soc_write(codec, WM8940_GPIO, reg | (div << 4));
                break;
        }
        return ret;
index c9ba826ccb36f527f3d09ca91f33424ec000cb36,91d3c6dbeba3317758d747a6c6568cae625ea79e..3fc9d2f747353c4fafe18e92f4fd8952afa26ee0
@@@ -1961,7 -1961,13 +1961,13 @@@ static int wm8962_readable_register(str
  
  static int wm8962_reset(struct snd_soc_codec *codec)
  {
-       return snd_soc_write(codec, WM8962_SOFTWARE_RESET, 0x6243);
+       int ret;
+       ret = snd_soc_write(codec, WM8962_SOFTWARE_RESET, 0x6243);
+       if (ret != 0)
+               return ret;
+       return snd_soc_write(codec, WM8962_PLL_SOFTWARE_RESET, 0);
  }
  
  static const DECLARE_TLV_DB_SCALE(inpga_tlv, -2325, 75, 0);
@@@ -2360,15 -2366,14 +2366,14 @@@ static int sysclk_event(struct snd_soc_
  
                        snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1,
                                            WM8962_FLL_ENA, WM8962_FLL_ENA);
-                       if (wm8962->irq) {
-                               timeout = msecs_to_jiffies(5);
-                               timeout = wait_for_completion_timeout(&wm8962->fll_lock,
-                                                                     timeout);
-                               if (timeout == 0)
-                                       dev_err(codec->dev,
-                                               "Timed out starting FLL\n");
-                       }
+                       timeout = msecs_to_jiffies(5);
+                       timeout = wait_for_completion_timeout(&wm8962->fll_lock,
+                                                             timeout);
+                       if (wm8962->irq && timeout == 0)
+                               dev_err(codec->dev,
+                                       "Timed out starting FLL\n");
                }
                break;
  
@@@ -2679,8 -2684,6 +2684,8 @@@ SND_SOC_DAPM_SUPPLY("TOCLK", WM8962_ADD
  SND_SOC_DAPM_SUPPLY_S("DSP2", 1, WM8962_DSP2_POWER_MANAGEMENT,
                      WM8962_DSP2_ENA_SHIFT, 0, dsp2_event,
                      SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
 +SND_SOC_DAPM_SUPPLY("TEMP_HP", WM8962_ADDITIONAL_CONTROL_4, 2, 0, NULL, 0),
 +SND_SOC_DAPM_SUPPLY("TEMP_SPK", WM8962_ADDITIONAL_CONTROL_4, 1, 0, NULL, 0),
  
  SND_SOC_DAPM_MIXER("INPGAL", WM8962_LEFT_INPUT_PGA_CONTROL, 4, 0,
                   inpgal, ARRAY_SIZE(inpgal)),
@@@ -2836,9 -2839,6 +2841,9 @@@ static const struct snd_soc_dapm_route 
  
        { "HPOUTL", NULL, "HPOUT" },
        { "HPOUTR", NULL, "HPOUT" },
 +
 +      { "HPOUTL", NULL, "TEMP_HP" },
 +      { "HPOUTR", NULL, "TEMP_HP" },
  };
  
  static const struct snd_soc_dapm_route wm8962_spk_mono_intercon[] = {
        { "Speaker Output", NULL, "Speaker PGA" },
        { "Speaker Output", NULL, "SYSCLK" },
        { "Speaker Output", NULL, "TOCLK" },
 +      { "Speaker Output", NULL, "TEMP_SPK" },
  
        { "SPKOUT", NULL, "Speaker Output" },
  };
@@@ -2884,12 -2883,10 +2889,12 @@@ static const struct snd_soc_dapm_route 
        { "SPKOUTL Output", NULL, "SPKOUTL PGA" },
        { "SPKOUTL Output", NULL, "SYSCLK" },
        { "SPKOUTL Output", NULL, "TOCLK" },
 +      { "SPKOUTL Output", NULL, "TEMP_SPK" },
  
        { "SPKOUTR Output", NULL, "SPKOUTR PGA" },
        { "SPKOUTR Output", NULL, "SYSCLK" },
        { "SPKOUTR Output", NULL, "TOCLK" },
 +      { "SPKOUTR Output", NULL, "TEMP_SPK" },
  
        { "SPKOUTL", NULL, "SPKOUTL Output" },
        { "SPKOUTR", NULL, "SPKOUTR Output" },
@@@ -3402,7 -3399,6 +3407,7 @@@ static int wm8962_set_fll(struct snd_so
        unsigned long timeout;
        int ret;
        int fll1 = snd_soc_read(codec, WM8962_FLL_CONTROL_1) & WM8962_FLL_ENA;
 +      int sysclk = snd_soc_read(codec, WM8962_CLOCKING2) & WM8962_SYSCLK_ENA;
  
        /* Any change? */
        if (source == wm8962->fll_src && Fref == wm8962->fll_fref &&
  
        try_wait_for_completion(&wm8962->fll_lock);
  
 +      if (sysclk)
 +              fll1 |= WM8962_FLL_ENA;
 +
        snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1,
                            WM8962_FLL_FRAC | WM8962_FLL_REFCLK_SRC_MASK |
                            WM8962_FLL_ENA, fll1);
@@@ -3669,14 -3662,6 +3674,14 @@@ int wm8962_mic_detect(struct snd_soc_co
        snd_soc_jack_report(wm8962->jack, 0,
                            SND_JACK_MICROPHONE | SND_JACK_BTN_0);
  
 +      if (jack) {
 +              snd_soc_dapm_force_enable_pin(&codec->dapm, "SYSCLK");
 +              snd_soc_dapm_force_enable_pin(&codec->dapm, "MICBIAS");
 +      } else {
 +              snd_soc_dapm_disable_pin(&codec->dapm, "SYSCLK");
 +              snd_soc_dapm_disable_pin(&codec->dapm, "MICBIAS");
 +      }
 +
        return 0;
  }
  EXPORT_SYMBOL_GPL(wm8962_mic_detect);
@@@ -4049,6 -4034,11 +4054,11 @@@ static int wm8962_probe(struct snd_soc_
        snd_soc_update_bits(codec, WM8962_CLOCKING2,
                            WM8962_CLKREG_OVD, WM8962_CLKREG_OVD);
  
+       /* Ensure that the oscillator and PLLs are disabled */
+       snd_soc_update_bits(codec, WM8962_PLL2,
+                           WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA,
+                           0);
        regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
  
        if (pdata) {