[mips][microMIPS] Fix an invalid read for lwm32 and reserved reglist values.
authorDaniel Sanders <daniel.sanders@imgtec.com>
Fri, 18 Sep 2015 14:20:54 +0000 (14:20 +0000)
committerDaniel Sanders <daniel.sanders@imgtec.com>
Fri, 18 Sep 2015 14:20:54 +0000 (14:20 +0000)
Summary:
Some values of 'reglist' are reserved and cause the disassembler to read past
the end of the Regs array. Treat lwm32's containing reserved values as invalid
instructions.

Reviewers: zoran.jovanovic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12959

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247990 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Mips/Disassembler/MipsDisassembler.cpp
test/MC/Disassembler/Mips/micromips32r3/invalid.txt [new file with mode: 0644]

index 4aa0afd7e031176f9fae979b70a031996783ad20..27eb399ba96a1018c023450ff52a44670828f298 100644 (file)
@@ -1919,11 +1919,17 @@ static DecodeStatus DecodeRegListOperand(MCInst &Inst,
   unsigned RegNum;
 
   unsigned RegLst = fieldFromInstruction(Insn, 21, 5);
+
   // Empty register lists are not allowed.
   if (RegLst == 0)
     return MCDisassembler::Fail;
 
   RegNum = RegLst & 0xf;
+
+  // RegLst values 10-15, and 26-31 are reserved.
+  if (RegNum > 9)
+    return MCDisassembler::Fail;
+
   for (unsigned i = 0; i < RegNum; i++)
     Inst.addOperand(MCOperand::createReg(Regs[i]));
 
diff --git a/test/MC/Disassembler/Mips/micromips32r3/invalid.txt b/test/MC/Disassembler/Mips/micromips32r3/invalid.txt
new file mode 100644 (file)
index 0000000..fcaa616
--- /dev/null
@@ -0,0 +1,4 @@
+# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mattr=micromips \
+# RUN:     2>&1 | FileCheck %s
+
+0x21 0xe2 0x5c 0x71 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding