Constant fold SIGN_EXTEND_INREG with ashr not lshr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47992 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index dd1343590ad25cd2a1c2ec224fd0099488435e71..0dba4a44f5b3f6cef063099c8315ca84de1db4cc 100644 (file)
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2029,7 +2029,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
       APInt Val = N1C->getAPIntValue();
       unsigned FromBits = MVT::getSizeInBits(cast<VTSDNode>(N2)->getVT());
       Val <<= Val.getBitWidth()-FromBits;
-      Val = Val.lshr(Val.getBitWidth()-FromBits);
+      Val = Val.ashr(Val.getBitWidth()-FromBits);
       return getConstant(Val, VT);
     }
     break;

diff --git a/test/CodeGen/ARM/2008-03-05-SxtInRegBug.ll b/test/CodeGen/ARM/2008-03-05-SxtInRegBug.ll
new file mode 100644 (file)
index 0000000..ca34275
--- /dev/null
+++ b/test/CodeGen/ARM/2008-03-05-SxtInRegBug.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | not grep 255
+
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+       br label %bb1
+bb1:           ; preds = %entry
+       %tmp3.i.i = load i8* null, align 1              ; <i8> [#uses=1]
+       %tmp4.i.i = icmp slt i8 %tmp3.i.i, 0            ; <i1> [#uses=1]
+       br i1 %tmp4.i.i, label %bb2, label %bb3
+bb2:           ; preds = %bb1
+       ret i32 1
+bb3:           ; preds = %bb1
+       ret i32 0
+}