clocksource: mct: use fin_pll clock as the tick clock source for mct
authorThomas Abraham <thomas.abraham@linaro.org>
Sat, 9 Mar 2013 08:10:31 +0000 (17:10 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Mon, 25 Mar 2013 09:17:14 +0000 (18:17 +0900)
With the migration of Exynos4 clocks to use common clock framework, the
old styled 'xtal' clock is not used anymore. Instead, the clock 'fin_pll'
is used as the tick clock for mct controller.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
drivers/clocksource/exynos_mct.c

index 545c98976e93d1b2a6a73c204ffd01dcfd3b084a..f817c540126984fa9ad922980f6b650ea63f6fc0 100644 (file)
@@ -479,10 +479,13 @@ static struct local_timer_ops exynos4_mct_tick_ops __cpuinitdata = {
 
 static void __init exynos4_timer_resources(struct device_node *np)
 {
-       struct clk *mct_clk;
-       mct_clk = clk_get(NULL, "xtal");
+       struct clk *tick_clk;
 
-       clk_rate = clk_get_rate(mct_clk);
+       tick_clk = np ? of_clk_get_by_name(np, "fin_pll") :
+                               clk_get(NULL, "fin_pll");
+       if (IS_ERR(tick_clk))
+               panic("%s: unable to determine tick clock rate\n", __func__);
+       clk_rate = clk_get_rate(tick_clk);
 
        reg_base = np ? of_iomap(np, 0) : S5P_VA_SYSTIMER;
        if (!reg_base)