32-to-64-bit sign extension pattern.
authorAkira Hatanaka <ahatanaka@mips.com>
Tue, 20 Dec 2011 22:06:20 +0000 (22:06 +0000)
committerAkira Hatanaka <ahatanaka@mips.com>
Tue, 20 Dec 2011 22:06:20 +0000 (22:06 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146995 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Mips/Mips64InstrInfo.td
lib/Target/Mips/MipsISelDAGToDAG.cpp

index 2eea4cfb11bbe735ff32c16e0368c9e6d4622629..c54a8e411d6523878a25d8d689d28d42dab64626 100644 (file)
@@ -299,3 +299,5 @@ def : Pat<(i32 (trunc CPU64Regs:$src)),
 // 32-to-64-bit extension
 def : Pat<(i64 (anyext CPURegs:$src)), (SLL64_32 CPURegs:$src)>;
 def : Pat<(i64 (zext CPURegs:$src)), (DSRL (DSLL64_32 CPURegs:$src), 32)>;
+def : Pat<(i64 (sext CPURegs:$src)), (SLL64_32 CPURegs:$src)>;
+
index b33a4e6c09b611706e586a590fc149b477bbb6c5..8f3cb55715062b72dbf4242616aa156230000b41 100644 (file)
@@ -293,6 +293,12 @@ SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
     case ISD::ConstantFP: {
       ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(Node);
       if (Node->getValueType(0) == MVT::f64 && CN->isExactlyValue(+0.0)) {
+        if (Subtarget.hasMips64()) {
+          SDValue Zero = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), dl,
+                                                Mips::ZERO_64, MVT::i64);
+          return CurDAG->getMachineNode(Mips::DMTC1, dl, MVT::f64, Zero);
+        }
+
         SDValue Zero = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), dl,
                                               Mips::ZERO, MVT::i32);
         return CurDAG->getMachineNode(Mips::BuildPairF64, dl, MVT::f64, Zero,