[ARM] Add Thumb2 ADD with PC narrowing from 3 operand to 2

Differential Revision: http://reviews.llvm.org/D11055

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241800 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 19c4990ef2673872e84fbc32858034e0704c280a..cea7070abd02b70975a8333f9313ce435947a58c 100644 (file)
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -5467,14 +5467,14 @@ void ARMAsmParser::getMnemonicAcceptInfo(StringRef Mnemonic, StringRef FullInst,
     CanAcceptPredicationCode = true;
 }
 
-// \brief Some Thumb1 instructions have two operand forms that are not
+// \brief Some Thumb instructions have two operand forms that are not
 // available as three operand, convert to two operand form if possible.
 //
 // FIXME: We would really like to be able to tablegen'erate this.
 void ARMAsmParser::tryConvertingToTwoOperandForm(StringRef Mnemonic,
                                                  bool CarrySetting,
                                                  OperandVector &Operands) {
-  if (Operands.size() != 6 || !isThumbOne())
+  if (Operands.size() != 6)
     return;
 
   ARMOperand &Op3 = static_cast<ARMOperand &>(*Operands[3]);
@@ -5482,7 +5482,17 @@ void ARMAsmParser::tryConvertingToTwoOperandForm(StringRef Mnemonic,
   if (!Op3.isReg() || !Op4.isReg())
     return;
 
+  // For most Thumb2 cases we just generate the 3 operand form and reduce
+  // it in processInstruction(), but for ADD involving PC the the 3 operand
+  // form won't accept PC so we do the transformation here.
   ARMOperand &Op5 = static_cast<ARMOperand &>(*Operands[5]);
+  if (isThumbTwo()) {
+    if (Mnemonic != "add" ||
+        !(Op3.getReg() == ARM::PC || Op4.getReg() == ARM::PC ||
+          (Op5.isReg() && Op5.getReg() == ARM::PC)))
+      return;
+  } else if (!isThumbOne())
+    return;
 
   if (!(Mnemonic == "add" || Mnemonic == "sub" || Mnemonic == "and" ||
         Mnemonic == "eor" || Mnemonic == "lsl" || Mnemonic == "lsr" ||

diff --git a/test/MC/ARM/thumb2-narrow-dp.ll b/test/MC/ARM/thumb2-narrow-dp.ll
index 794430e375af1aefdf5ada30c5cd4baec83b0f33..42cf29793709c11b2d005435b01774dff40e584d 100644 (file)
--- a/test/MC/ARM/thumb2-narrow-dp.ll
+++ b/test/MC/ARM/thumb2-narrow-dp.ll
@@ -65,6 +65,10 @@
 
     ADD      r3, r3, r1          // T2
 // CHECK: add  r3, r1               @ encoding: [0x0b,0x44]
+    ADD      r4, r4, pc          // T2
+// CHECK: add  r4, pc               @ encoding: [0x7c,0x44]
+    ADD      pc, pc, r2          // T2
+// CHECK: add  pc, r2               @ encoding: [0x97,0x44]
 
 // ADD (SP plus immediate) A8.8.9
     ADD      sp, sp, #20         // T2