Reapply Gabor's 113839, 113840, and 113876 with a fix for a problem

encountered while building llvm-gcc for arm.  This is probably the same issue
that the ppc buildbot hit. llvm::prior works on a MachineBasicBlock::iterator,
not a plain MachineInstr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113983 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 864c5f9dbbd8bd62d43351f4306c9ce98f79ef37..4c97b82414cb0c4f65f2dd6dd0e443fcc83640f2 100644 (file)
--- a/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -1352,6 +1352,21 @@ AnalyzeCompare(const MachineInstr *MI, unsigned &SrcReg, int &CmpValue) const {
     SrcReg = MI->getOperand(0).getReg();
     CmpValue = MI->getOperand(1).getImm();
     return true;
+  case ARM::TSTri: {
+    MachineBasicBlock::const_iterator MII(MI);
+    if (MI->getParent()->begin() == MII)
+      return false;
+    const MachineInstr *AND = llvm::prior(MII);
+    if (AND->getOpcode() != ARM::ANDri)
+      return false;
+    if (MI->getOperand(0).getReg() == AND->getOperand(1).getReg() &&
+        MI->getOperand(1).getImm() == AND->getOperand(2).getImm()) {
+      SrcReg = AND->getOperand(0).getReg();
+      CmpValue = 0;
+      return true;
+    }
+    }
+    break;
   }
 
   return false;
@@ -1401,6 +1416,8 @@ OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpValue,
   switch (MI->getOpcode()) {
   default: break;
   case ARM::ADDri:
+  case ARM::ANDri:
+  case ARM::t2ANDri:
   case ARM::SUBri:
   case ARM::t2ADDri:
   case ARM::t2SUBri:

diff --git a/test/CodeGen/ARM/arm-and-tst-peephole.ll b/test/CodeGen/ARM/arm-and-tst-peephole.ll
index 77bc9eec1afb150b806f4e4d9a99206630d77ac9..8d42a794feee0c1c1af985b758de63031b1fd1e8 100644 (file)
--- a/test/CodeGen/ARM/arm-and-tst-peephole.ll
+++ b/test/CodeGen/ARM/arm-and-tst-peephole.ll
@@ -17,8 +17,7 @@ tailrecurse:                                      ; preds = %sw.bb, %entry
   %tmp2 = load i8** %scevgep5
   %0 = ptrtoint i8* %tmp2 to i32
 
-; CHECK:      and lr, r12, #3
-; CHECK-NEXT: tst r12, #3
+; CHECK:      ands r12, r12, #3
 ; CHECK-NEXT: beq LBB0_4
 
 ; T2:      movs r5, #3