pxor (for FLD0SS) encoding was missing the OpSize prefix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26244 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index d1d262c68210824d5d952d598b1a1715242d5707..c6b1ff55e5f87527cc9acacb425f2fbea69ea0c8 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -2491,7 +2491,7 @@ def UCOMISDrm: I<0x2E, MRMSrcMem, (ops FR64:$src1, f64mem:$src2),
 // FIXME: remove when we can teach regalloc that xor reg, reg is ok.
 def FLD0SS : I<0xEF, MRMInitReg, (ops FR32:$dst),
                "pxor $dst, $dst", [(set FR32:$dst, fp32imm0)]>,
-             Requires<[HasSSE1]>, TB;
+             Requires<[HasSSE1]>, TB, OpSize;
 def FLD0SD : I<0xEF, MRMInitReg, (ops FR64:$dst),
                "pxor $dst, $dst", [(set FR64:$dst, fp64imm0)]>,
              Requires<[HasSSE2]>, TB, OpSize;