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reglist has two operands.
author
Bill Wendling
<isanbard@gmail.com>
Mon, 8 Nov 2010 23:50:20 +0000
(23:50 +0000)
committer
Bill Wendling
<isanbard@gmail.com>
Mon, 8 Nov 2010 23:50:20 +0000
(23:50 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118457
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/ARM/ARMInstrInfo.td
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diff --git
a/lib/Target/ARM/ARMInstrInfo.td
b/lib/Target/ARM/ARMInstrInfo.td
index 7c7257900fd916e1c43419ede17229219225e484..0a988138a92f33405669f74cdfd5af90f4ffe14f 100644
(file)
--- a/
lib/Target/ARM/ARMInstrInfo.td
+++ b/
lib/Target/ARM/ARMInstrInfo.td
@@
-278,6
+278,7
@@
def brtarget : Operand<OtherVT>;
// A list of registers separated by comma. Used by load/store multiple.
def reglist : Operand<i32> {
+ int NumOperands = 2;
string EncoderMethod = "getRegisterListOpValue";
let PrintMethod = "printRegisterList";
}