drm/i915: Add support for port enable/disable for dual link configuration

For Dual Link MIPI Panels, both Port A and Port C should be enabled
during the MIPI encoder enabling sequence. Similarly, during the
disabling sequence, both ports needs to be disabled.

v2: Used for_each_dsi_port macro instead of for loop

v3: Used intel_dsi->ports instead of dual_link var for dual link configuration check

v4: Masking of the required MIPI port bits before writing proper values

Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 82da2323896c122ddd1c447ebdb091d9215c3004..b4a11ab7cb632fc58393368e64e469104570f729 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6665,6 +6665,7 @@ enum punit_power_well {
 #define  DPI_ENABLE                                    (1 << 31) /* A + C */
 #define  MIPIA_MIPI4DPHY_DELAY_COUNT_SHIFT             27
 #define  MIPIA_MIPI4DPHY_DELAY_COUNT_MASK              (0xf << 27)
+#define  DUAL_LINK_MODE_SHIFT                          26
 #define  DUAL_LINK_MODE_MASK                           (1 << 26)
 #define  DUAL_LINK_MODE_FRONT_BACK                     (0 << 26)
 #define  DUAL_LINK_MODE_PIXEL_ALTERNATIVE              (1 << 26)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 693736b88080324722029ed0467408c29c6e750f..fd4d3972c8cda998433b2cd48efea24b9324610e 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -108,28 +108,41 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder)
        struct drm_i915_private *dev_priv = dev->dev_private;
        struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
        struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
-       enum port port = intel_dsi_pipe_to_port(intel_crtc->pipe);
+       enum port port;
        u32 temp;
 
-       /* assert ip_tg_enable signal */
-       temp = I915_READ(MIPI_PORT_CTRL(port)) & ~LANE_CONFIGURATION_MASK;
-       temp = temp | intel_dsi->port_bits;
-       I915_WRITE(MIPI_PORT_CTRL(port), temp | DPI_ENABLE);
-       POSTING_READ(MIPI_PORT_CTRL(port));
+       for_each_dsi_port(port, intel_dsi->ports) {
+               temp = I915_READ(MIPI_PORT_CTRL(port));
+               temp &= ~LANE_CONFIGURATION_MASK;
+               temp &= ~DUAL_LINK_MODE_MASK;
+
+               if (intel_dsi->ports == ((1 << PORT_A) | (1 << PORT_C))) {
+                       temp |= (intel_dsi->dual_link - 1)
+                                               << DUAL_LINK_MODE_SHIFT;
+                       temp |= intel_crtc->pipe ?
+                                       LANE_CONFIGURATION_DUAL_LINK_B :
+                                       LANE_CONFIGURATION_DUAL_LINK_A;
+               }
+               /* assert ip_tg_enable signal */
+               I915_WRITE(MIPI_PORT_CTRL(port), temp | DPI_ENABLE);
+               POSTING_READ(MIPI_PORT_CTRL(port));
+       }
 }
 
 static void intel_dsi_port_disable(struct intel_encoder *encoder)
 {
        struct drm_device *dev = encoder->base.dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
-       struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
-       enum port port = intel_dsi_pipe_to_port(intel_crtc->pipe);
+       struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+       enum port port;
        u32 temp;
 
-       /* de-assert ip_tg_enable signal */
-       temp = I915_READ(MIPI_PORT_CTRL(port));
-       I915_WRITE(MIPI_PORT_CTRL(port), temp & ~DPI_ENABLE);
-       POSTING_READ(MIPI_PORT_CTRL(port));
+       for_each_dsi_port(port, intel_dsi->ports) {
+               /* de-assert ip_tg_enable signal */
+               temp = I915_READ(MIPI_PORT_CTRL(port));
+               I915_WRITE(MIPI_PORT_CTRL(port), temp & ~DPI_ENABLE);
+               POSTING_READ(MIPI_PORT_CTRL(port));
+       }
 }
 
 static void intel_dsi_device_ready(struct intel_encoder *encoder)

diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index 7f5d0280b9d78a6d6f289a669516b9e401aee0eb..f2cc2fc8c979dcecc789863903515e37145b1922 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -104,6 +104,7 @@ struct intel_dsi {
        u8 clock_stop;
 
        u8 escape_clk_div;
+       u8 dual_link;
        u32 port_bits;
        u32 bw_timer;
        u32 dphy_reg;

diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index 7766c420f6b4801a553d36c66eaa3a88127b7be2..f60146f84467fce346e52d05011d498cf347a68e 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -287,6 +287,10 @@ static bool generic_init(struct intel_dsi_device *dsi)
        intel_dsi->clock_stop = mipi_config->enable_clk_stop ? 1 : 0;
        intel_dsi->lane_count = mipi_config->lane_cnt + 1;
        intel_dsi->pixel_format = mipi_config->videomode_color_format << 7;
+       intel_dsi->dual_link = mipi_config->dual_link;
+
+       if (intel_dsi->dual_link)
+               intel_dsi->ports = ((1 << PORT_A) | (1 << PORT_C));
 
        if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB666)
                bits_per_pixel = 18;