implement extloadi8 and extloadi16

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31047 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 349c358b89ea0f32bc23ad076d75bf28a99aafb6..c16e3e85cd4bc07656b4cb439b0b4e168dfa75ed 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -160,6 +160,10 @@ def LDRB    : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
                        "ldrb $dst, [$addr]",
                        [(set IntRegs:$dst, (zextloadi8 IntRegs:$addr))]>;
 
+def LDRB2   : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
+                       "ldrb $dst, [$addr]",
+                       [(set IntRegs:$dst, (extloadi8 IntRegs:$addr))]>;
+
 def LDRSB   : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
                        "ldrsb $dst, [$addr]",
                        [(set IntRegs:$dst, (sextloadi8 IntRegs:$addr))]>;
@@ -168,6 +172,10 @@ def LDRH    : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
                        "ldrh $dst, [$addr]",
                        [(set IntRegs:$dst, (zextloadi16 IntRegs:$addr))]>;
 
+def LDRH2   : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
+                       "ldrh $dst, [$addr]",
+                       [(set IntRegs:$dst, (extloadi16 IntRegs:$addr))]>;
+
 def LDRSH   : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
                        "ldrsh $dst, [$addr]",
                        [(set IntRegs:$dst, (sextloadi16 IntRegs:$addr))]>;