drm/tegra: Stop CRTC at CRTC disable time

Previously output drivers would all stop the display controller in their
disable path. However with the transition to atomic modesetting the
display controller needs to be kept running until all planes have been
disabled so that software can properly determine (using VBLANK counts)
when it is safe to remove the framebuffers associated with the planes.

Moving this code into the display controller's disable path also gets
rid of the duplication of this into all output drivers.

Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index dab7ea261e74d423e3ae8c4502d1aa2b487e9ffe..915bbdc350ac5434156fcc8fffd8e55bfe0f7d25 100644 (file)
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -940,6 +940,7 @@ static void tegra_crtc_disable(struct drm_crtc *crtc)
        struct tegra_dc *dc = to_tegra_dc(crtc);
        struct drm_device *drm = crtc->dev;
        struct drm_plane *plane;
+       u32 value;
 
        drm_for_each_legacy_plane(plane, &drm->mode_config.plane_list) {
                if (plane->crtc == crtc) {
@@ -953,6 +954,11 @@ static void tegra_crtc_disable(struct drm_crtc *crtc)
                }
        }
 
+       /* stop the display controller */
+       value = tegra_dc_readl(dc, DC_CMD_DISPLAY_COMMAND);
+       value &= ~DISP_CTRL_MODE_MASK;
+       tegra_dc_writel(dc, value, DC_CMD_DISPLAY_COMMAND);
+
        drm_crtc_vblank_off(crtc);
        tegra_dc_commit(dc);
 }

diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
index 0ca8ca3775fd6ffa300d45c6f627960f1e92f297..4c0dfe92402a6e59a2945719508cf71b99f476f9 100644 (file)
--- a/drivers/gpu/drm/tegra/dsi.c
+++ b/drivers/gpu/drm/tegra/dsi.c
@@ -769,10 +769,6 @@ static int tegra_output_dsi_disable(struct tegra_output *output)
                           PW4_ENABLE | PM0_ENABLE | PM1_ENABLE);
                tegra_dc_writel(dc, value, DC_CMD_DISPLAY_POWER_CONTROL);
 
-               value = tegra_dc_readl(dc, DC_CMD_DISPLAY_COMMAND);
-               value &= ~DISP_CTRL_MODE_MASK;
-               tegra_dc_writel(dc, value, DC_CMD_DISPLAY_COMMAND);
-
                value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);
                value &= ~DSI_ENABLE;
                tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS);

diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c
index f118b914293e4bd35f7e40fe781004370b8bf000..d4c635148cc76267a0980093f3b7c3a52c418308 100644 (file)
--- a/drivers/gpu/drm/tegra/hdmi.c
+++ b/drivers/gpu/drm/tegra/hdmi.c
@@ -1033,10 +1033,6 @@ static int tegra_output_hdmi_disable(struct tegra_output *output)
                tegra_dc_writel(dc, value, DC_CMD_DISPLAY_POWER_CONTROL);
                */
 
-               value = tegra_dc_readl(dc, DC_CMD_DISPLAY_COMMAND);
-               value &= ~DISP_CTRL_MODE_MASK;
-               tegra_dc_writel(dc, value, DC_CMD_DISPLAY_COMMAND);
-
                value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);
                value &= ~HDMI_ENABLE;
                tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS);

diff --git a/drivers/gpu/drm/tegra/rgb.c b/drivers/gpu/drm/tegra/rgb.c
index 3b851abbccaebc50cde152dc1b36eba2a3ff3d69..39b8d5fe04b2fe065f6b5e12c044f6624a3dd9a4 100644 (file)
--- a/drivers/gpu/drm/tegra/rgb.c
+++ b/drivers/gpu/drm/tegra/rgb.c
@@ -143,10 +143,6 @@ static int tegra_output_rgb_disable(struct tegra_output *output)
                   PW4_ENABLE | PM0_ENABLE | PM1_ENABLE);
        tegra_dc_writel(rgb->dc, value, DC_CMD_DISPLAY_POWER_CONTROL);
 
-       value = tegra_dc_readl(rgb->dc, DC_CMD_DISPLAY_COMMAND);
-       value &= ~DISP_CTRL_MODE_MASK;
-       tegra_dc_writel(rgb->dc, value, DC_CMD_DISPLAY_COMMAND);
-
        tegra_dc_write_regs(rgb->dc, rgb_disable, ARRAY_SIZE(rgb_disable));
 
        tegra_dc_commit(rgb->dc);

diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c
index 6a341822abe9bd043ef6a712eb5855eb476389c3..1fe801ee8eb01d37379d3edf9dc8aa1291a9bc5b 100644 (file)
--- a/drivers/gpu/drm/tegra/sor.c
+++ b/drivers/gpu/drm/tegra/sor.c
@@ -1071,10 +1071,6 @@ static int tegra_output_sor_disable(struct tegra_output *output)
                tegra_dc_writel(dc, value, DC_CMD_DISPLAY_POWER_CONTROL);
                */
 
-               value = tegra_dc_readl(dc, DC_CMD_DISPLAY_COMMAND);
-               value &= ~DISP_CTRL_MODE_MASK;
-               tegra_dc_writel(dc, value, DC_CMD_DISPLAY_COMMAND);
-
                value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);
                value &= ~SOR_ENABLE;
                tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS);