ath10k: add qca6164 support
authorMichal Kazior <michal.kazior@tieto.com>
Thu, 13 Aug 2015 12:32:26 +0000 (14:32 +0200)
committerKalle Valo <kvalo@qca.qualcomm.com>
Wed, 26 Aug 2015 09:07:23 +0000 (12:07 +0300)
This adds additional 0x0041 PCI Device ID
definition to ath10k for QCA6164 which is a 1
spatial stream sibling of the QCA6174 (which is 2
spatial stream chip).

The QCA6164 needs a dedicated board.bin file which
is different than the one used for QCA6174. If the
board.bin is wrong the device will crash early
while trying to boot firmware. The register dump
will look like this:

 ath10k_pci 0000:02:00.0: firmware register dump:
 ath10k_pci 0000:02:00.0: [00]: 0x05010000 0x000015B3 0x000A012D 0x00955B31
 ...

Note the value 0x000A012D.

Special credit goes to Alan Liu
<alanliu@qca.qualcomm.com> for providing support
help which enabled me to come up with this patch.

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
drivers/net/wireless/ath/ath10k/core.c
drivers/net/wireless/ath/ath10k/core.h
drivers/net/wireless/ath/ath10k/pci.c

index 7e378c2fa414d56d5c68447fd1bdc72feac3c532..b87b98617073bc7222044092effa08caeebcd8cc 100644 (file)
@@ -236,6 +236,17 @@ static int ath10k_init_configure_target(struct ath10k *ar)
                return ret;
        }
 
+       /* Some devices have a special sanity check that verifies the PCI
+        * Device ID is written to this host interest var. It is known to be
+        * required to boot QCA6164.
+        */
+       ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
+                                ar->dev_id);
+       if (ret) {
+               ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
+               return ret;
+       }
+
        return 0;
 }
 
index 862f6d0fac57dfbee026e37eb81756453681c07a..12542144fe125630d5b5ee1baef8a806e6b8322f 100644 (file)
@@ -554,6 +554,7 @@ struct ath10k {
        u8 mac_addr[ETH_ALEN];
 
        enum ath10k_hw_rev hw_rev;
+       u16 dev_id;
        u32 chip_id;
        u32 target_version;
        u8 fw_version_major;
index 826220f795c7082e1d64588e6492e8afd799e374..1046ab65b9ab31adda450f8b66a82c7a82cea1e9 100644 (file)
@@ -58,11 +58,13 @@ MODULE_PARM_DESC(reset_mode, "0: auto, 1: warm only (default: 0)");
 #define ATH10K_PCI_NUM_WARM_RESET_ATTEMPTS 3
 
 #define QCA988X_2_0_DEVICE_ID  (0x003c)
+#define QCA6164_2_1_DEVICE_ID  (0x0041)
 #define QCA6174_2_1_DEVICE_ID  (0x003e)
 #define QCA99X0_2_0_DEVICE_ID  (0x0040)
 
 static const struct pci_device_id ath10k_pci_id_table[] = {
        { PCI_VDEVICE(ATHEROS, QCA988X_2_0_DEVICE_ID) }, /* PCI-E QCA988X V2 */
+       { PCI_VDEVICE(ATHEROS, QCA6164_2_1_DEVICE_ID) }, /* PCI-E QCA6164 V2.1 */
        { PCI_VDEVICE(ATHEROS, QCA6174_2_1_DEVICE_ID) }, /* PCI-E QCA6174 V2.1 */
        { PCI_VDEVICE(ATHEROS, QCA99X0_2_0_DEVICE_ID) }, /* PCI-E QCA99X0 V2 */
        {0}
@@ -74,11 +76,19 @@ static const struct ath10k_pci_supp_chip ath10k_pci_supp_chips[] = {
         * because of that.
         */
        { QCA988X_2_0_DEVICE_ID, QCA988X_HW_2_0_CHIP_ID_REV },
+
+       { QCA6164_2_1_DEVICE_ID, QCA6174_HW_2_1_CHIP_ID_REV },
+       { QCA6164_2_1_DEVICE_ID, QCA6174_HW_2_2_CHIP_ID_REV },
+       { QCA6164_2_1_DEVICE_ID, QCA6174_HW_3_0_CHIP_ID_REV },
+       { QCA6164_2_1_DEVICE_ID, QCA6174_HW_3_1_CHIP_ID_REV },
+       { QCA6164_2_1_DEVICE_ID, QCA6174_HW_3_2_CHIP_ID_REV },
+
        { QCA6174_2_1_DEVICE_ID, QCA6174_HW_2_1_CHIP_ID_REV },
        { QCA6174_2_1_DEVICE_ID, QCA6174_HW_2_2_CHIP_ID_REV },
        { QCA6174_2_1_DEVICE_ID, QCA6174_HW_3_0_CHIP_ID_REV },
        { QCA6174_2_1_DEVICE_ID, QCA6174_HW_3_1_CHIP_ID_REV },
        { QCA6174_2_1_DEVICE_ID, QCA6174_HW_3_2_CHIP_ID_REV },
+
        { QCA99X0_2_0_DEVICE_ID, QCA99X0_HW_2_0_CHIP_ID_REV },
 };
 
@@ -1814,6 +1824,7 @@ static int ath10k_pci_get_num_banks(struct ath10k *ar)
        case QCA988X_2_0_DEVICE_ID:
        case QCA99X0_2_0_DEVICE_ID:
                return 1;
+       case QCA6164_2_1_DEVICE_ID:
        case QCA6174_2_1_DEVICE_ID:
                switch (MS(ar->chip_id, SOC_CHIP_ID_REV)) {
                case QCA6174_HW_1_0_CHIP_ID_REV:
@@ -2902,6 +2913,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
        case QCA988X_2_0_DEVICE_ID:
                hw_rev = ATH10K_HW_QCA988X;
                break;
+       case QCA6164_2_1_DEVICE_ID:
        case QCA6174_2_1_DEVICE_ID:
                hw_rev = ATH10K_HW_QCA6174;
                break;
@@ -2926,6 +2938,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
        ar_pci->pdev = pdev;
        ar_pci->dev = &pdev->dev;
        ar_pci->ar = ar;
+       ar->dev_id = pci_dev->device;
 
        if (pdev->subsystem_vendor || pdev->subsystem_device)
                scnprintf(ar->spec_board_id, sizeof(ar->spec_board_id),