[ARM64] Change SYS without a register to an alias to make disassembling more consistant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205898 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM64/ARM64InstrFormats.td b/lib/Target/ARM64/ARM64InstrFormats.td
index 378b698909e13c8da11ac8371ed7f14586508d01..ee82419371689728c3a84c576dccdd1a11a9ecda 100644 (file)
--- a/lib/Target/ARM64/ARM64InstrFormats.td
+++ b/lib/Target/ARM64/ARM64InstrFormats.td
@@ -774,22 +774,6 @@ def sys_cr_op : Operand<i32> {
   let ParserMatchClass = SysCRAsmOperand;
 }
 
-class SystemI<bit L, string asm>
-  : SimpleSystemI<L,
-                  (ins imm0_7:$op1, sys_cr_op:$Cn, sys_cr_op:$Cm, imm0_7:$op2),
-                   asm, "\t$op1, $Cn, $Cm, $op2">,
-    Sched<[WriteSys]> {
-  bits<3> op1;
-  bits<4> Cn;
-  bits<4> Cm;
-  bits<3> op2;
-  let Inst{20-19} = 0b01;
-  let Inst{18-16} = op1;
-  let Inst{15-12} = Cn;
-  let Inst{11-8}  = Cm;
-  let Inst{7-5}   = op2;
-}
-
 class SystemXtI<bit L, string asm>
   : RtSystemI<L, (outs),
        (ins imm0_7:$op1, sys_cr_op:$Cn, sys_cr_op:$Cm, imm0_7:$op2, GPR64:$Rt),

diff --git a/lib/Target/ARM64/ARM64InstrInfo.td b/lib/Target/ARM64/ARM64InstrInfo.td
index b3baf94d410953670e8f367cd1c5da3129dec8f2..7d319dd61eb294d3fbe5cff387b2064f791a7b55 100644 (file)
--- a/lib/Target/ARM64/ARM64InstrInfo.td
+++ b/lib/Target/ARM64/ARM64InstrInfo.td
@@ -332,10 +332,13 @@ def MSRcpsr: MSRcpsrI;
 def : Pat<(ARM64threadpointer), (MRS 0xde82)>;
 
 // Generic system instructions
-def SYS    : SystemI<0, "sys">;
 def SYSxt  : SystemXtI<0, "sys">;
 def SYSLxt : SystemLXtI<1, "sysl">;
 
+def : InstAlias<"sys $op1, $Cn, $Cm, $op2",
+                (SYSxt imm0_7:$op1, sys_cr_op:$Cn,
+                 sys_cr_op:$Cm, imm0_7:$op2, XZR)>;
+
 //===----------------------------------------------------------------------===//
 // Move immediate instructions.
 //===----------------------------------------------------------------------===//

diff --git a/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp b/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
index 82beb6bbebd8e24aca3d5afb76aba041faf5578b..8c0e6fa917910e35df9727df0add63e0a526eef8 100644 (file)
--- a/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
+++ b/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
@@ -56,7 +56,7 @@ void ARM64InstPrinter::printInst(const MCInst *MI, raw_ostream &O,
 
   unsigned Opcode = MI->getOpcode();
 
-  if (Opcode == ARM64::SYS || Opcode == ARM64::SYSxt)
+  if (Opcode == ARM64::SYSxt)
     if (printSysAlias(MI, O)) {
       printAnnotation(O, Annot);
       return;
@@ -750,8 +750,7 @@ void ARM64AppleInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
 bool ARM64InstPrinter::printSysAlias(const MCInst *MI, raw_ostream &O) {
 #ifndef NDEBUG
   unsigned Opcode = MI->getOpcode();
-  assert((Opcode == ARM64::SYS || Opcode == ARM64::SYSxt) &&
-         "Invalid opcode for SYS alias!");
+  assert(Opcode == ARM64::SYSxt && "Invalid opcode for SYS alias!");
 #endif
 
   const char *Asm = 0;
@@ -961,9 +960,11 @@ bool ARM64InstPrinter::printSysAlias(const MCInst *MI, raw_ostream &O) {
   }
 
   if (Asm) {
+    unsigned Reg = MI->getOperand(4).getReg();
+
     O << '\t' << Asm;
-    if (MI->getNumOperands() == 5)
-      O << ", " << getRegisterName(MI->getOperand(4).getReg());
+    if (StringRef(Asm).lower().find("all") == StringRef::npos)
+      O << ", " << getRegisterName(Reg);
   }
 
   return Asm != 0;

diff --git a/test/MC/Disassembler/ARM64/system.txt b/test/MC/Disassembler/ARM64/system.txt
index 53b4a6cd69aa77c1595ae6cdbbe97be7d1ce1e34..9027a60dd30dc436601ea5a468b6284f959840ad 100644 (file)
--- a/test/MC/Disassembler/ARM64/system.txt
+++ b/test/MC/Disassembler/ARM64/system.txt
@@ -32,6 +32,8 @@
 # CHECK: dmb osh
   0x9f 0x37 0x03 0xd5
 # CHECK: dsb nsh
+  0x3f 0x76 0x08 0xd5
+# CHECK: dc ivac
 
 #-----------------------------------------------------------------------------
 # Generic system instructions