{
}
#endif
+
+#ifdef CONFIG_PM
+int __sramdata vdd_cpu_vol ,vdd_core_vol;
+void act8846_device_suspend(void)
+{
+ struct regulator *dcdc;
+ #ifdef CONFIG_ACT8846_SUPPORT_RESET
+ sram_gpio_set_value(pmic_vsel, GPIO_LOW);
+
+ dcdc =dvfs_get_regulator( "vdd_cpu");
+ vdd_cpu_vol = regulator_get_voltage(dcdc);
+ regulator_set_voltage(dcdc, 900000, 900000);
+ udelay(100);
+
+ dcdc =dvfs_get_regulator( "vdd_core");
+ vdd_core_vol = regulator_get_voltage(dcdc);
+ regulator_set_voltage(dcdc, 900000, 900000);
+ udelay(100);
+
+ dcdc =regulator_get(NULL, "act_dcdc4");
+ regulator_set_voltage(dcdc, 2800000, 2800000);
+ regulator_put(dcdc);
+ udelay(100);
+
+ #endif
+}
+
+void act8846_device_resume(void)
+{
+ struct regulator *dcdc;
+ #ifdef CONFIG_ACT8846_SUPPORT_RESET
+
+ dcdc =dvfs_get_regulator( "vdd_cpu");
+ regulator_set_voltage(dcdc, vdd_cpu_vol, vdd_cpu_vol);
+ udelay(100);
+
+ dcdc =dvfs_get_regulator( "vdd_core");
+ regulator_set_voltage(dcdc, vdd_core_vol, vdd_core_vol);
+ udelay(100);
+
+ dcdc =regulator_get(NULL, "act_dcdc4");
+ regulator_set_voltage(dcdc, 3000000, 3000000);
+ regulator_put(dcdc);
+ udelay(100);
+
+ sram_gpio_set_value(pmic_vsel, GPIO_HIGH);
+
+ #endif
+
+}
+#else
+void act8846_device_suspend(void)
+{
+}
+void act8846_device_resume(void)
+{
+}
+#endif
+
void __sramfunc board_pmu_act8846_suspend(void)
{
#ifdef CONFIG_CLK_SWITCH_TO_32K
sram_udelay(2000);
#endif
}
+void __sramfunc board_act8846_set_suspend_vol(void)
+{
+#ifdef CONFIG_ACT8846_SUPPORT_RESET
+ sram_gpio_set_value(pmic_vsel, GPIO_HIGH);
+#endif
+}
+void __sramfunc board_act8846_set_resume_vol(void)
+{
+#ifdef CONFIG_ACT8846_SUPPORT_RESET
+ sram_gpio_set_value(pmic_vsel, GPIO_LOW);
+#endif
+}
+
#endif
readl_relaxed(RK30_DDR_PUBL_BASE);
readl_relaxed(RK30_I2C1_BASE+SZ_4K);
readl_relaxed(RK30_GPIO0_BASE);
+ readl_relaxed(RK30_GPIO3_BASE);
#if defined(RK30_GPIO6_BASE)
readl_relaxed(RK30_GPIO6_BASE);
#endif
__weak void rk30_pwm_suspend_voltage_set(void){}
__weak void rk30_pwm_resume_voltage_set(void){}
+__weak void board_act8846_set_suspend_vol(void){}
+__weak void board_act8846_set_resume_vol(void){}
__weak void __sramfunc rk30_pwm_logic_suspend_voltage(void){}
__weak void __sramfunc rk30_pwm_logic_resume_voltage(void){}
rk30_suspend_voltage_set(1000000);
rk30_pwm_logic_suspend_voltage();
sram_printch('7');
-
+ #ifdef CONFIG_ACT8846_SUPPORT_RESET
+ board_act8846_set_suspend_vol();
+ #endif
for (i = 0; i < CRU_CLKGATES_CON_CNT; i++) {
clkgt_regs[i] = cru_readl(CRU_CLKGATES_CON(i));
| (1 << CLK_GATE_HCLK_IMEM1 % 16)
| (1 << CLK_GATE_HCLK_IMEM0 % 16)
#endif
- , clkgt_regs[4], CRU_CLKGATES_CON(4), 0xffff);
+ , clkgt_regs[4], CRU_CLKGATES_CON(4), 0xffff);
gate_save_soc_clk(0
| (1 << CLK_GATE_PCLK_GRF % 16)
| (1 << CLK_GATE_PCLK_PMU % 16)
for (i = 0; i < CRU_CLKGATES_CON_CNT; i++) {
cru_writel(clkgt_regs[i] | 0xffff0000, CRU_CLKGATES_CON(i));
}
-
+
+ #ifdef CONFIG_ACT8846_SUPPORT_RESET
+ board_act8846_set_resume_vol();
+ #endif
sram_printch('7');
rk30_pwm_logic_resume_voltage();
rk30_suspend_voltage_resume(1100000);
}
EXPORT_SYMBOL_GPL(act8846_device_shutdown);
+__weak void act8846_device_suspend(void) {}
+__weak void act8846_device_resume(void) {}
+#ifdef CONFIG_PM
+static int act8846_suspend(struct i2c_client *i2c, pm_message_t mesg)
+{
+ act8846_device_suspend();
+ return 0;
+}
+
+static int act8846_resume(struct i2c_client *i2c)
+{
+ act8846_device_resume();
+ return 0;
+}
+#else
+static int act8846_suspend(struct i2c_client *i2c, pm_message_t mesg)
+{
+ return 0;
+}
+
+static int act8846_resume(struct i2c_client *i2c)
+{
+ return 0;
+}
+#endif
+
+
#ifdef CONFIG_HAS_EARLYSUSPEND
__weak void act8846_early_suspend(struct early_suspend *h) {}
__weak void act8846_late_resume(struct early_suspend *h) {}
.probe = act8846_i2c_probe,
.remove = __devexit_p(act8846_i2c_remove),
.id_table = act8846_i2c_id,
+ #ifdef CONFIG_PM
+ .suspend = act8846_suspend,
+ .resume = act8846_resume,
+ #endif
};
static int __init act8846_module_init(void)