tg3: Simplify ring control block setup

The current code calls tg3_set_bdinfo() separately on napi0, followed by
a loop that does napi1+. Simplify it by setting bdinfo in the loop for
all napi contexts.

Signed-off-by: Nithin Nayak Sujir <nsujir@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index ae808b03affeaa63e9322d112e72bc4fd95b8b6f..bb1d34c109f5b64d748709d963edf87a77c43187 100644 (file)
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -9239,6 +9239,48 @@ static void __tg3_set_coalesce(struct tg3 *tp, struct ethtool_coalesce *ec)
        }
 }
 
+/* tp->lock is held. */
+static void tg3_tx_rcbs_init(struct tg3 *tp)
+{
+       int i = 0;
+       u32 txrcb = NIC_SRAM_SEND_RCB;
+
+       if (tg3_flag(tp, ENABLE_TSS))
+               i++;
+
+       for (; i < tp->irq_max; i++, txrcb += TG3_BDINFO_SIZE) {
+               struct tg3_napi *tnapi = &tp->napi[i];
+
+               if (!tnapi->tx_ring)
+                       continue;
+
+               tg3_set_bdinfo(tp, txrcb, tnapi->tx_desc_mapping,
+                              (TG3_TX_RING_SIZE << BDINFO_FLAGS_MAXLEN_SHIFT),
+                              NIC_SRAM_TX_BUFFER_DESC);
+       }
+}
+
+/* tp->lock is held. */
+static void tg3_rx_ret_rcbs_init(struct tg3 *tp)
+{
+       int i = 0;
+       u32 rxrcb = NIC_SRAM_RCV_RET_RCB;
+
+       if (tg3_flag(tp, ENABLE_RSS))
+               i++;
+
+       for (; i < tp->irq_max; i++, rxrcb += TG3_BDINFO_SIZE) {
+               struct tg3_napi *tnapi = &tp->napi[i];
+
+               if (!tnapi->rx_rcb)
+                       continue;
+
+               tg3_set_bdinfo(tp, rxrcb, tnapi->rx_rcb_mapping,
+                              (tp->rx_ret_ring_mask + 1) <<
+                               BDINFO_FLAGS_MAXLEN_SHIFT, 0);
+       }
+}
+
 /* tp->lock is held. */
 static void tg3_rings_reset(struct tg3 *tp)
 {
@@ -9315,9 +9357,6 @@ static void tg3_rings_reset(struct tg3 *tp)
                        tw32_tx_mbox(mbox + i * 8, 0);
        }
 
-       txrcb = NIC_SRAM_SEND_RCB;
-       rxrcb = NIC_SRAM_RCV_RET_RCB;
-
        /* Clear status block in ram. */
        memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE);
 
@@ -9327,46 +9366,20 @@ static void tg3_rings_reset(struct tg3 *tp)
        tw32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_LOW,
             ((u64) tnapi->status_mapping & 0xffffffff));
 
-       if (tnapi->tx_ring) {
-               tg3_set_bdinfo(tp, txrcb, tnapi->tx_desc_mapping,
-                              (TG3_TX_RING_SIZE <<
-                               BDINFO_FLAGS_MAXLEN_SHIFT),
-                              NIC_SRAM_TX_BUFFER_DESC);
-               txrcb += TG3_BDINFO_SIZE;
-       }
-
-       if (tnapi->rx_rcb) {
-               tg3_set_bdinfo(tp, rxrcb, tnapi->rx_rcb_mapping,
-                              (tp->rx_ret_ring_mask + 1) <<
-                               BDINFO_FLAGS_MAXLEN_SHIFT, 0);
-               rxrcb += TG3_BDINFO_SIZE;
-       }
-
        stblk = HOSTCC_STATBLCK_RING1;
 
        for (i = 1, tnapi++; i < tp->irq_cnt; i++, tnapi++) {
                u64 mapping = (u64)tnapi->status_mapping;
                tw32(stblk + TG3_64BIT_REG_HIGH, mapping >> 32);
                tw32(stblk + TG3_64BIT_REG_LOW, mapping & 0xffffffff);
+               stblk += 8;
 
                /* Clear status block in ram. */
                memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE);
-
-               if (tnapi->tx_ring) {
-                       tg3_set_bdinfo(tp, txrcb, tnapi->tx_desc_mapping,
-                                      (TG3_TX_RING_SIZE <<
-                                       BDINFO_FLAGS_MAXLEN_SHIFT),
-                                      NIC_SRAM_TX_BUFFER_DESC);
-                       txrcb += TG3_BDINFO_SIZE;
-               }
-
-               tg3_set_bdinfo(tp, rxrcb, tnapi->rx_rcb_mapping,
-                              ((tp->rx_ret_ring_mask + 1) <<
-                               BDINFO_FLAGS_MAXLEN_SHIFT), 0);
-
-               stblk += 8;
-               rxrcb += TG3_BDINFO_SIZE;
        }
+
+       tg3_tx_rcbs_init(tp);
+       tg3_rx_ret_rcbs_init(tp);
 }
 
 static void tg3_setup_rxbd_thresholds(struct tg3 *tp)