tg3: Make tg3_rings_reset() more concise
authorNithin Sujir <nsujir@broadcom.com>
Thu, 23 May 2013 11:11:24 +0000 (11:11 +0000)
committerDavid S. Miller <davem@davemloft.net>
Sat, 25 May 2013 05:23:29 +0000 (22:23 -0700)
Simplify the rings reset function and increase readability by moving the
control block disable code into separate functions.

Signed-off-by: Nithin Nayak Sujir <nsujir@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/broadcom/tg3.c

index bb1d34c109f5b64d748709d963edf87a77c43187..693c5f23c3ea6b0eae99460626e45bd83bf9e5d8 100644 (file)
@@ -9239,6 +9239,28 @@ static void __tg3_set_coalesce(struct tg3 *tp, struct ethtool_coalesce *ec)
        }
 }
 
+/* tp->lock is held. */
+static void tg3_tx_rcbs_disable(struct tg3 *tp)
+{
+       u32 txrcb, limit;
+
+       /* Disable all transmit rings but the first. */
+       if (!tg3_flag(tp, 5705_PLUS))
+               limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 16;
+       else if (tg3_flag(tp, 5717_PLUS))
+               limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 4;
+       else if (tg3_flag(tp, 57765_CLASS) ||
+                tg3_asic_rev(tp) == ASIC_REV_5762)
+               limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 2;
+       else
+               limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE;
+
+       for (txrcb = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE;
+            txrcb < limit; txrcb += TG3_BDINFO_SIZE)
+               tg3_write_mem(tp, txrcb + TG3_BDINFO_MAXLEN_FLAGS,
+                             BDINFO_FLAGS_DISABLED);
+}
+
 /* tp->lock is held. */
 static void tg3_tx_rcbs_init(struct tg3 *tp)
 {
@@ -9260,6 +9282,29 @@ static void tg3_tx_rcbs_init(struct tg3 *tp)
        }
 }
 
+/* tp->lock is held. */
+static void tg3_rx_ret_rcbs_disable(struct tg3 *tp)
+{
+       u32 rxrcb, limit;
+
+       /* Disable all receive return rings but the first. */
+       if (tg3_flag(tp, 5717_PLUS))
+               limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 17;
+       else if (!tg3_flag(tp, 5705_PLUS))
+               limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 16;
+       else if (tg3_asic_rev(tp) == ASIC_REV_5755 ||
+                tg3_asic_rev(tp) == ASIC_REV_5762 ||
+                tg3_flag(tp, 57765_CLASS))
+               limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 4;
+       else
+               limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE;
+
+       for (rxrcb = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE;
+            rxrcb < limit; rxrcb += TG3_BDINFO_SIZE)
+               tg3_write_mem(tp, rxrcb + TG3_BDINFO_MAXLEN_FLAGS,
+                             BDINFO_FLAGS_DISABLED);
+}
+
 /* tp->lock is held. */
 static void tg3_rx_ret_rcbs_init(struct tg3 *tp)
 {
@@ -9285,42 +9330,12 @@ static void tg3_rx_ret_rcbs_init(struct tg3 *tp)
 static void tg3_rings_reset(struct tg3 *tp)
 {
        int i;
-       u32 stblk, txrcb, rxrcb, limit;
+       u32 stblk;
        struct tg3_napi *tnapi = &tp->napi[0];
 
-       /* Disable all transmit rings but the first. */
-       if (!tg3_flag(tp, 5705_PLUS))
-               limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 16;
-       else if (tg3_flag(tp, 5717_PLUS))
-               limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 4;
-       else if (tg3_flag(tp, 57765_CLASS) ||
-                tg3_asic_rev(tp) == ASIC_REV_5762)
-               limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 2;
-       else
-               limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE;
-
-       for (txrcb = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE;
-            txrcb < limit; txrcb += TG3_BDINFO_SIZE)
-               tg3_write_mem(tp, txrcb + TG3_BDINFO_MAXLEN_FLAGS,
-                             BDINFO_FLAGS_DISABLED);
-
-
-       /* Disable all receive return rings but the first. */
-       if (tg3_flag(tp, 5717_PLUS))
-               limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 17;
-       else if (!tg3_flag(tp, 5705_PLUS))
-               limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 16;
-       else if (tg3_asic_rev(tp) == ASIC_REV_5755 ||
-                tg3_asic_rev(tp) == ASIC_REV_5762 ||
-                tg3_flag(tp, 57765_CLASS))
-               limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 4;
-       else
-               limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE;
+       tg3_tx_rcbs_disable(tp);
 
-       for (rxrcb = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE;
-            rxrcb < limit; rxrcb += TG3_BDINFO_SIZE)
-               tg3_write_mem(tp, rxrcb + TG3_BDINFO_MAXLEN_FLAGS,
-                             BDINFO_FLAGS_DISABLED);
+       tg3_rx_ret_rcbs_disable(tp);
 
        /* Disable interrupts */
        tw32_mailbox_f(tp->napi[0].int_mbox, 1);