MIPS: BCM47XX: make reboot more relaiable

The reboot on the BCM47XX SoCs is done, by setting the watchdog counter
to 1 and let it trigger a reboot, when it reaches 0. Some devices with
a BCM4705/BCM4785 SoC do not reboot when the counter is set to 1 and
decreased to 0 by the hardware. It looks like it works more reliable
when we set it to 3. As far as I understand the hardware, this should
not make any difference, but I do not have access to any documentation
for this SoC.
It is still not 100% reliable.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: zajec5@gmail.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7488/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index 63a4b0e915dc14ec33576e464f5803284523c72b..cc75861c01879e02c960a458983a67d0d0b0c0d9 100644 (file)
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -59,12 +59,12 @@ static void bcm47xx_machine_restart(char *command)
        switch (bcm47xx_bus_type) {
 #ifdef CONFIG_BCM47XX_SSB
        case BCM47XX_BUS_TYPE_SSB:
-               ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);
+               ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 3);
                break;
 #endif
 #ifdef CONFIG_BCM47XX_BCMA
        case BCM47XX_BUS_TYPE_BCMA:
-               bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1);
+               bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 3);
                break;
 #endif
        }