Add i16 address mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35551 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index bf6d22414e8e720e5e9087d0e7bae3eafcf03e31..bb715cb3ca48d34351ce433cf84def828094e412 100644 (file)
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -1300,19 +1300,24 @@ bool ARMTargetLowering::isLegalAddressingMode(const AddrMode &AM,
       return false;
 
   default:
-    // FIXME: verify.
     switch (getValueType(Ty)) {
     default: return false;
     case MVT::i1:
     case MVT::i8:
-    // TODO: i16?  i64 should be i32, no?
     case MVT::i32:
+    case MVT::i64:
+      // This assumes i64 is legalized to a pair of i32. If not (i.e.
+      // ldrd / strd are used, then its address mode is same as i16.
       // r + r
       if (AM.Scale == 2)
         return true;
       // r + r << imm
       if (!isPowerOf2_32(AM.Scale & ~1))
         return false;
+    case MVT::i16:
+      // r + r
+      if (((unsigned)AM.HasBaseReg + AM.Scale) <= 2)
+        return true;
     }
     break;
   }