usb: fix host20 clk gate

diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi
index 4bbc32e43c2ab7f9b48bd38c73ed11369ae6387b..12f7e28292cdbc680850b88c8a8e7fb2a99b62fa 100755 (executable)
--- a/arch/arm/boot/dts/rk312x.dtsi
+++ b/arch/arm/boot/dts/rk312x.dtsi
@@ -677,7 +677,7 @@
                compatible = "rockchip,rk3126_usb20_host";
                reg = <0x101c0000 0x40000>;
                interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&clk_gates1 6>, <&clk_gates7 3>;
+               clocks = <&clk_gates1 6>, <&clk_gates10 14>;
                clock-names = "clk_usbphy1", "hclk_usb1";
                resets = <&reset RK3128_RST_USBOTG1>, <&reset RK3128_RST_UTMI1>,
                                <&reset RK3128_RST_OTGC1>;