[fast-isel] Rather then assert (or segfault in a non-asserts build), fall back

to selection DAG isel if we're unable to handle a non-double multi-reg retval.
rdar://11430407
PR12796

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156622 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp
index f3d930fbe0f455593920033eee1d3cad03bebbea..f49a5d3f83c95b369b6363fe7d9870a817e4e522 100644 (file)
--- a/lib/Target/ARM/ARMFastISel.cpp
+++ b/lib/Target/ARM/ARMFastISel.cpp
@@ -2014,8 +2014,7 @@ bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
 
       // Finally update the result.
       UpdateValueMap(I, ResultReg);
-    } else {
-      assert(RVLocs.size() == 1 &&"Can't handle non-double multi-reg retvals!");
+    } else if (RVLocs.size() == 1) {
       EVT CopyVT = RVLocs[0].getValVT();
 
       // Special handling for extended integers.
@@ -2031,6 +2030,9 @@ bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
 
       // Finally update the result.
       UpdateValueMap(I, ResultReg);
+    } else {
+      // Can't handle non-double multi-reg retvals.
+      return false;
     }
   }