clk: ti: divider: Provide error check for incoming parameters in set_rate
authorNishanth Menon <nm@ti.com>
Mon, 18 Aug 2014 16:56:54 +0000 (11:56 -0500)
committerTero Kristo <t-kristo@ti.com>
Thu, 21 Aug 2014 15:04:16 +0000 (18:04 +0300)
Check for valid parameters in check rate. Else, we end up getting errors
like:
[    0.000000] Division by zero in kernel.
[    0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc1 #1
[    0.000000] [<c0015160>] (unwind_backtrace) from [<c0011978>] (show_stack+0x10/0x14)
[    0.000000] [<c0011978>] (show_stack) from [<c055f5f4>] (dump_stack+0x78/0x94)
[    0.000000] [<c055f5f4>] (dump_stack) from [<c02e17cc>] (Ldiv0+0x8/0x10)
[    0.000000] [<c02e17cc>] (Ldiv0) from [<c047d228>] (ti_clk_divider_set_rate+0x14/0x14c)
[    0.000000] [<c047d228>] (ti_clk_divider_set_rate) from [<c047a938>] (clk_change_rate+0x138/0x180)
[    0.000000] [<c047a938>] (clk_change_rate) from [<c047a908>] (clk_change_rate+0x108/0x180)

This occurs as part of the inital clock tree update of child clock nodes
where new_rate could be 0 for non functional clocks.

Fixes: b4761198bfaf296 ("CLK: ti: add support for ti divider-clock")
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
drivers/clk/ti/divider.c

index e6aa10db7bba1f78116ff6cd0b02a49b65bea857..a837f703be658304b7d2a3a0e2743bd17d7077a7 100644 (file)
@@ -211,11 +211,16 @@ static long ti_clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
 static int ti_clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
                                   unsigned long parent_rate)
 {
-       struct clk_divider *divider = to_clk_divider(hw);
+       struct clk_divider *divider;
        unsigned int div, value;
        unsigned long flags = 0;
        u32 val;
 
+       if (!hw || !rate)
+               return -EINVAL;
+
+       divider = to_clk_divider(hw);
+
        div = DIV_ROUND_UP(parent_rate, rate);
        value = _get_val(divider, div);