Remove the last bit of isShuffleMaskLegal checks and improve the comment regarding...
authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>
Sat, 4 Sep 2010 02:58:56 +0000 (02:58 +0000)
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>
Sat, 4 Sep 2010 02:58:56 +0000 (02:58 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113059 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp

index 147f201ac6732dead5c4ff069cc19e69b55ee10e..974d9eb6ea3996e97c544c808c419e8993f2a7e2 100644 (file)
@@ -5472,14 +5472,12 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const {
                                 X86::getShufflePALIGNRImmediate(SVOp),
                                 DAG);
 
-  // MMX shuffles not already handled must be expanded.
+  // Only a few shuffle masks are handled for 64-bit vectors (MMX), and
+  // 64-bit vectors which made to this point can't be handled, they are
+  // expanded.
   if (VT.getSizeInBits() == 64)
     return SDValue();
 
-  // FIXME: pshufb, blends, shifts.
-  if (VT.getVectorNumElements() == 2)
-    return Op;
-
   if (ShuffleVectorSDNode::isSplatMask(&M[0], VT) &&
       SVOp->getSplatIndex() == 0 && V2IsUndef) {
     if (VT == MVT::v2f64)