Fix incorrect atomics codegen introduced in r154705, and extend test to catch it.
authorRichard Smith <richard-llvm@metafoo.co.uk>
Mon, 16 Apr 2012 18:43:53 +0000 (18:43 +0000)
committerRichard Smith <richard-llvm@metafoo.co.uk>
Mon, 16 Apr 2012 18:43:53 +0000 (18:43 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154845 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/atomic_op.ll

index c0e935df5845ec50c2e4e0a8c571f6e58c06a4fe..8418bb12b99c352a0af2bebf5143f263838a1952 100644 (file)
@@ -11420,7 +11420,7 @@ X86TargetLowering::EmitAtomicBitwiseWithCustomInserter(MachineInstr *bInstr,
     t3 = t2;
 
   MIB = BuildMI(newMBB, dl, TII->get(TargetOpcode::COPY), EAXreg);
-  MIB.addReg(t3);
+  MIB.addReg(t1);
 
   MIB = BuildMI(newMBB, dl, TII->get(CXchgOpc));
   for (int i=0; i <= lastAddrIndx; ++i)
index c8cb78e34ee7194526821d397269bba46279fcfb..7c5abe2095cce231296453bd48ce1bffd34bc895 100644 (file)
@@ -107,10 +107,15 @@ entry:
         ; CHECK: cmpxchgl
   %17 = cmpxchg i32* %val2, i32 1976, i32 1 monotonic
        store i32 %17, i32* %old
-        ; CHECK: andl
-        ; CHECK: notl
-        ; CHECK: lock
-        ; CHECK: cmpxchgl
+        ; CHECK: movl  $1401, %[[R17mask:[a-z]*]]
+        ; CHECK: movl  [[R17atomic:.*]], %eax
+        ; CHECK: movl  %eax, %[[R17newval:[a-z]*]]
+        ; CHECK: andl  %[[R17mask]], %[[R17newval]]
+        ; CHECK: notl  %[[R17newval]]
+        ; CHECK: lock
+        ; CHECK: cmpxchgl      %[[R17newval]], [[R17atomic]]
+        ; CHECK: jne
+        ; CHECK: movl  %eax,
   %18 = atomicrmw nand i32* %val2, i32 1401 monotonic
   store i32 %18, i32* %old
         ; CHECK: andl