Merge remote-tracking branch 'origin/master' into drm-next
authorDave Airlie <airlied@redhat.com>
Thu, 22 Jan 2015 00:44:41 +0000 (10:44 +1000)
committerDave Airlie <airlied@redhat.com>
Thu, 22 Jan 2015 00:44:41 +0000 (10:44 +1000)
Backmerge Linus tree after rc5 + drm-fixes went in.

There were a few amdkfd conflicts I wanted to avoid,
and Ben requested this for nouveau also.

Conflicts:
drivers/gpu/drm/amd/amdkfd/Makefile
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c
drivers/gpu/drm/amd/amdkfd/kfd_priv.h
drivers/gpu/drm/amd/include/kgd_kfd_interface.h
drivers/gpu/drm/i915/intel_runtime_pm.c
drivers/gpu/drm/radeon/radeon_kfd.c

20 files changed:
1  2 
MAINTAINERS
drivers/gpu/drm/Makefile
drivers/gpu/drm/amd/amdkfd/Makefile
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
drivers/gpu/drm/amd/amdkfd/kfd_device.c
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c
drivers/gpu/drm/amd/amdkfd/kfd_priv.h
drivers/gpu/drm/amd/amdkfd/kfd_topology.c
drivers/gpu/drm/amd/include/kgd_kfd_interface.h
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_pm.c
drivers/gpu/drm/i915/intel_runtime_pm.c
drivers/gpu/drm/radeon/cik.c
drivers/gpu/drm/radeon/cik_sdma.c
drivers/gpu/drm/radeon/radeon_kfd.c

diff --cc MAINTAINERS
Simple merge
Simple merge
index cd09c05ee7e4bcdbaf6b2d9f24f448fa1610ef06,307a309110e60d5f473be86d26c24e3b0cb80a90..0f4960148126d96adb7cbdf9432da533428c4080
@@@ -7,11 -7,7 +7,10 @@@ ccflags-y := -Iinclude/drm -Idrivers/gp
  amdkfd-y      := kfd_module.o kfd_device.o kfd_chardev.o kfd_topology.o \
                kfd_pasid.o kfd_doorbell.o kfd_flat_memory.o \
                kfd_process.o kfd_queue.o kfd_mqd_manager.o \
 -              kfd_kernel_queue.o kfd_packet_manager.o \
 -              kfd_process_queue_manager.o kfd_device_queue_manager.o
 +              kfd_mqd_manager_cik.o kfd_mqd_manager_vi.o \
 +              kfd_kernel_queue.o kfd_kernel_queue_cik.o \
 +              kfd_kernel_queue_vi.o kfd_packet_manager.o \
 +              kfd_process_queue_manager.o kfd_device_queue_manager.o \
 +              kfd_device_queue_manager_cik.o kfd_device_queue_manager_vi.o \
-               kfd_interrupt.o
  
  obj-$(CONFIG_HSA_AMD) += amdkfd.o
index 38b6150a19eeb5cad10ed9dcb3033aeb8cb61355,fcfdf23e1913ed01663b46bebfda5eec8bc4079d..732087dcac914bf88bf5b6e9e244ac92922ba568
@@@ -270,12 -235,9 +263,12 @@@ static int kfd_ioctl_create_queue(struc
        if (err)
                return err;
  
-       pr_debug("kfd: looking for gpu id 0x%x\n", args.gpu_id);
-       dev = kfd_device_by_id(args.gpu_id);
++      pr_debug("kfd: looking for gpu id 0x%x\n", args->gpu_id);
+       dev = kfd_device_by_id(args->gpu_id);
 -      if (dev == NULL)
 +      if (dev == NULL) {
-               pr_debug("kfd: gpu id 0x%x was not found\n", args.gpu_id);
++              pr_debug("kfd: gpu id 0x%x was not found\n", args->gpu_id);
                return -EINVAL;
 +      }
  
        mutex_lock(&p->mutex);
  
@@@ -436,10 -382,10 +413,10 @@@ static int kfd_ioctl_set_memory_policy(
                         ? cache_policy_coherent : cache_policy_noncoherent;
  
        alternate_policy =
-               (args.alternate_policy == KFD_IOC_CACHE_POLICY_COHERENT)
+               (args->alternate_policy == KFD_IOC_CACHE_POLICY_COHERENT)
                   ? cache_policy_coherent : cache_policy_noncoherent;
  
 -      if (!dev->dqm->set_cache_memory_policy(dev->dqm,
 +      if (!dev->dqm->ops.set_cache_memory_policy(dev->dqm,
                                &pdd->qpd,
                                default_policy,
                                alternate_policy,
index a770ec6f22cad24a878d96426ebb2f9395cefdea,633532a2e7ec875b968343975c2d49d69d220abc..1ba8332419faee78ce45f7179b379bd5a285ffb1
@@@ -274,13 -230,9 +267,11 @@@ dqm_start_error
  device_queue_manager_error:
        amd_iommu_free_device(kfd->pdev);
  device_iommu_pasid_error:
-       kfd_interrupt_exit(kfd);
- kfd_interrupt_error:
        kfd_topology_remove_device(kfd);
  kfd_topology_add_device_error:
 -      kfd2kgd->fini_sa_manager(kfd->kgd);
 +      kfd_gtt_sa_fini(kfd);
 +kfd_gtt_sa_init_error:
 +      kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem);
        dev_err(kfd_device,
                "device (%x:%x) NOT added due to errors\n",
                kfd->pdev->vendor, kfd->pdev->device);
@@@ -293,10 -245,7 +284,9 @@@ void kgd2kfd_device_exit(struct kfd_de
        if (kfd->init_complete) {
                device_queue_manager_uninit(kfd->dqm);
                amd_iommu_free_device(kfd->pdev);
-               kfd_interrupt_exit(kfd);
                kfd_topology_remove_device(kfd);
 +              kfd_gtt_sa_fini(kfd);
 +              kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem);
        }
  
        kfree(kfd);
@@@ -337,198 -286,5 +327,190 @@@ int kgd2kfd_resume(struct kfd_dev *kfd
  /* This is called directly from KGD at ISR. */
  void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry)
  {
-       if (kfd->init_complete) {
-               spin_lock(&kfd->interrupt_lock);
-               if (kfd->interrupts_active
-                   && enqueue_ih_ring_entry(kfd, ih_ring_entry))
-                       schedule_work(&kfd->interrupt_work);
-               spin_unlock(&kfd->interrupt_lock);
-       }
+       /* Process interrupts / schedule work as necessary */
  }
 +
 +static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
 +                              unsigned int chunk_size)
 +{
 +      unsigned int num_of_bits;
 +
 +      BUG_ON(!kfd);
 +      BUG_ON(!kfd->gtt_mem);
 +      BUG_ON(buf_size < chunk_size);
 +      BUG_ON(buf_size == 0);
 +      BUG_ON(chunk_size == 0);
 +
 +      kfd->gtt_sa_chunk_size = chunk_size;
 +      kfd->gtt_sa_num_of_chunks = buf_size / chunk_size;
 +
 +      num_of_bits = kfd->gtt_sa_num_of_chunks / BITS_PER_BYTE;
 +      BUG_ON(num_of_bits == 0);
 +
 +      kfd->gtt_sa_bitmap = kzalloc(num_of_bits, GFP_KERNEL);
 +
 +      if (!kfd->gtt_sa_bitmap)
 +              return -ENOMEM;
 +
 +      pr_debug("kfd: gtt_sa_num_of_chunks = %d, gtt_sa_bitmap = %p\n",
 +                      kfd->gtt_sa_num_of_chunks, kfd->gtt_sa_bitmap);
 +
 +      mutex_init(&kfd->gtt_sa_lock);
 +
 +      return 0;
 +
 +}
 +
 +static void kfd_gtt_sa_fini(struct kfd_dev *kfd)
 +{
 +      mutex_destroy(&kfd->gtt_sa_lock);
 +      kfree(kfd->gtt_sa_bitmap);
 +}
 +
 +static inline uint64_t kfd_gtt_sa_calc_gpu_addr(uint64_t start_addr,
 +                                              unsigned int bit_num,
 +                                              unsigned int chunk_size)
 +{
 +      return start_addr + bit_num * chunk_size;
 +}
 +
 +static inline uint32_t *kfd_gtt_sa_calc_cpu_addr(void *start_addr,
 +                                              unsigned int bit_num,
 +                                              unsigned int chunk_size)
 +{
 +      return (uint32_t *) ((uint64_t) start_addr + bit_num * chunk_size);
 +}
 +
 +int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size,
 +                      struct kfd_mem_obj **mem_obj)
 +{
 +      unsigned int found, start_search, cur_size;
 +
 +      BUG_ON(!kfd);
 +
 +      if (size == 0)
 +              return -EINVAL;
 +
 +      if (size > kfd->gtt_sa_num_of_chunks * kfd->gtt_sa_chunk_size)
 +              return -ENOMEM;
 +
 +      *mem_obj = kmalloc(sizeof(struct kfd_mem_obj), GFP_KERNEL);
 +      if ((*mem_obj) == NULL)
 +              return -ENOMEM;
 +
 +      pr_debug("kfd: allocated mem_obj = %p for size = %d\n", *mem_obj, size);
 +
 +      start_search = 0;
 +
 +      mutex_lock(&kfd->gtt_sa_lock);
 +
 +kfd_gtt_restart_search:
 +      /* Find the first chunk that is free */
 +      found = find_next_zero_bit(kfd->gtt_sa_bitmap,
 +                                      kfd->gtt_sa_num_of_chunks,
 +                                      start_search);
 +
 +      pr_debug("kfd: found = %d\n", found);
 +
 +      /* If there wasn't any free chunk, bail out */
 +      if (found == kfd->gtt_sa_num_of_chunks)
 +              goto kfd_gtt_no_free_chunk;
 +
 +      /* Update fields of mem_obj */
 +      (*mem_obj)->range_start = found;
 +      (*mem_obj)->range_end = found;
 +      (*mem_obj)->gpu_addr = kfd_gtt_sa_calc_gpu_addr(
 +                                      kfd->gtt_start_gpu_addr,
 +                                      found,
 +                                      kfd->gtt_sa_chunk_size);
 +      (*mem_obj)->cpu_ptr = kfd_gtt_sa_calc_cpu_addr(
 +                                      kfd->gtt_start_cpu_ptr,
 +                                      found,
 +                                      kfd->gtt_sa_chunk_size);
 +
 +      pr_debug("kfd: gpu_addr = %p, cpu_addr = %p\n",
 +                      (uint64_t *) (*mem_obj)->gpu_addr, (*mem_obj)->cpu_ptr);
 +
 +      /* If we need only one chunk, mark it as allocated and get out */
 +      if (size <= kfd->gtt_sa_chunk_size) {
 +              pr_debug("kfd: single bit\n");
 +              set_bit(found, kfd->gtt_sa_bitmap);
 +              goto kfd_gtt_out;
 +      }
 +
 +      /* Otherwise, try to see if we have enough contiguous chunks */
 +      cur_size = size - kfd->gtt_sa_chunk_size;
 +      do {
 +              (*mem_obj)->range_end =
 +                      find_next_zero_bit(kfd->gtt_sa_bitmap,
 +                                      kfd->gtt_sa_num_of_chunks, ++found);
 +              /*
 +               * If next free chunk is not contiguous than we need to
 +               * restart our search from the last free chunk we found (which
 +               * wasn't contiguous to the previous ones
 +               */
 +              if ((*mem_obj)->range_end != found) {
 +                      start_search = found;
 +                      goto kfd_gtt_restart_search;
 +              }
 +
 +              /*
 +               * If we reached end of buffer, bail out with error
 +               */
 +              if (found == kfd->gtt_sa_num_of_chunks)
 +                      goto kfd_gtt_no_free_chunk;
 +
 +              /* Check if we don't need another chunk */
 +              if (cur_size <= kfd->gtt_sa_chunk_size)
 +                      cur_size = 0;
 +              else
 +                      cur_size -= kfd->gtt_sa_chunk_size;
 +
 +      } while (cur_size > 0);
 +
 +      pr_debug("kfd: range_start = %d, range_end = %d\n",
 +              (*mem_obj)->range_start, (*mem_obj)->range_end);
 +
 +      /* Mark the chunks as allocated */
 +      for (found = (*mem_obj)->range_start;
 +              found <= (*mem_obj)->range_end;
 +              found++)
 +              set_bit(found, kfd->gtt_sa_bitmap);
 +
 +kfd_gtt_out:
 +      mutex_unlock(&kfd->gtt_sa_lock);
 +      return 0;
 +
 +kfd_gtt_no_free_chunk:
 +      pr_debug("kfd: allocation failed with mem_obj = %p\n", mem_obj);
 +      mutex_unlock(&kfd->gtt_sa_lock);
 +      kfree(mem_obj);
 +      return -ENOMEM;
 +}
 +
 +int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj)
 +{
 +      unsigned int bit;
 +
 +      BUG_ON(!kfd);
 +
 +      /* Act like kfree when trying to free a NULL object */
 +      if (!mem_obj)
 +              return 0;
 +
 +      pr_debug("kfd: free mem_obj = %p, range_start = %d, range_end = %d\n",
 +                      mem_obj, mem_obj->range_start, mem_obj->range_end);
 +
 +      mutex_lock(&kfd->gtt_sa_lock);
 +
 +      /* Mark the chunks as free */
 +      for (bit = mem_obj->range_start;
 +              bit <= mem_obj->range_end;
 +              bit++)
 +              clear_bit(bit, kfd->gtt_sa_bitmap);
 +
 +      mutex_unlock(&kfd->gtt_sa_lock);
 +
 +      kfree(mem_obj);
 +      return 0;
 +}
index 4e582debfaa91d385bc0311f059fa1891bb15061,0000000000000000000000000000000000000000..a318743cdcc2cce1a4b915c962fadb92d13445f0
mode 100644,000000..100644
--- /dev/null
@@@ -1,448 -1,0 +1,448 @@@
-       return kfd2kgd->hqd_is_occupies(mm->dev->kgd, queue_address,
 +/*
 + * Copyright 2014 Advanced Micro Devices, Inc.
 + *
 + * Permission is hereby granted, free of charge, to any person obtaining a
 + * copy of this software and associated documentation files (the "Software"),
 + * to deal in the Software without restriction, including without limitation
 + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 + * and/or sell copies of the Software, and to permit persons to whom the
 + * Software is furnished to do so, subject to the following conditions:
 + *
 + * The above copyright notice and this permission notice shall be included in
 + * all copies or substantial portions of the Software.
 + *
 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 + * OTHER DEALINGS IN THE SOFTWARE.
 + *
 + */
 +
 +#include <linux/printk.h>
 +#include <linux/slab.h>
 +#include "kfd_priv.h"
 +#include "kfd_mqd_manager.h"
 +#include "cik_regs.h"
 +#include "cik_structs.h"
 +
 +static inline struct cik_mqd *get_mqd(void *mqd)
 +{
 +      return (struct cik_mqd *)mqd;
 +}
 +
 +static int init_mqd(struct mqd_manager *mm, void **mqd,
 +              struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr,
 +              struct queue_properties *q)
 +{
 +      uint64_t addr;
 +      struct cik_mqd *m;
 +      int retval;
 +
 +      BUG_ON(!mm || !q || !mqd);
 +
 +      pr_debug("kfd: In func %s\n", __func__);
 +
 +      retval = kfd_gtt_sa_allocate(mm->dev, sizeof(struct cik_mqd),
 +                                      mqd_mem_obj);
 +
 +      if (retval != 0)
 +              return -ENOMEM;
 +
 +      m = (struct cik_mqd *) (*mqd_mem_obj)->cpu_ptr;
 +      addr = (*mqd_mem_obj)->gpu_addr;
 +
 +      memset(m, 0, ALIGN(sizeof(struct cik_mqd), 256));
 +
 +      m->header = 0xC0310800;
 +      m->compute_pipelinestat_enable = 1;
 +      m->compute_static_thread_mgmt_se0 = 0xFFFFFFFF;
 +      m->compute_static_thread_mgmt_se1 = 0xFFFFFFFF;
 +      m->compute_static_thread_mgmt_se2 = 0xFFFFFFFF;
 +      m->compute_static_thread_mgmt_se3 = 0xFFFFFFFF;
 +
 +      /*
 +       * Make sure to use the last queue state saved on mqd when the cp
 +       * reassigns the queue, so when queue is switched on/off (e.g over
 +       * subscription or quantum timeout) the context will be consistent
 +       */
 +      m->cp_hqd_persistent_state =
 +                              DEFAULT_CP_HQD_PERSISTENT_STATE | PRELOAD_REQ;
 +
 +      m->cp_mqd_control             = MQD_CONTROL_PRIV_STATE_EN;
 +      m->cp_mqd_base_addr_lo        = lower_32_bits(addr);
 +      m->cp_mqd_base_addr_hi        = upper_32_bits(addr);
 +
 +      m->cp_hqd_ib_control = DEFAULT_MIN_IB_AVAIL_SIZE | IB_ATC_EN;
 +      /* Although WinKFD writes this, I suspect it should not be necessary */
 +      m->cp_hqd_ib_control = IB_ATC_EN | DEFAULT_MIN_IB_AVAIL_SIZE;
 +
 +      m->cp_hqd_quantum = QUANTUM_EN | QUANTUM_SCALE_1MS |
 +                              QUANTUM_DURATION(10);
 +
 +      /*
 +       * Pipe Priority
 +       * Identifies the pipe relative priority when this queue is connected
 +       * to the pipeline. The pipe priority is against the GFX pipe and HP3D.
 +       * In KFD we are using a fixed pipe priority set to CS_MEDIUM.
 +       * 0 = CS_LOW (typically below GFX)
 +       * 1 = CS_MEDIUM (typically between HP3D and GFX
 +       * 2 = CS_HIGH (typically above HP3D)
 +       */
 +      m->cp_hqd_pipe_priority = 1;
 +      m->cp_hqd_queue_priority = 15;
 +
 +      *mqd = m;
 +      if (gart_addr != NULL)
 +              *gart_addr = addr;
 +      retval = mm->update_mqd(mm, m, q);
 +
 +      return retval;
 +}
 +
 +static int init_mqd_sdma(struct mqd_manager *mm, void **mqd,
 +                      struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr,
 +                      struct queue_properties *q)
 +{
 +      int retval;
 +      struct cik_sdma_rlc_registers *m;
 +
 +      BUG_ON(!mm || !mqd || !mqd_mem_obj);
 +
 +      retval = kfd_gtt_sa_allocate(mm->dev,
 +                                      sizeof(struct cik_sdma_rlc_registers),
 +                                      mqd_mem_obj);
 +
 +      if (retval != 0)
 +              return -ENOMEM;
 +
 +      m = (struct cik_sdma_rlc_registers *) (*mqd_mem_obj)->cpu_ptr;
 +
 +      memset(m, 0, sizeof(struct cik_sdma_rlc_registers));
 +
 +      *mqd = m;
 +      if (gart_addr != NULL)
 +              *gart_addr = (*mqd_mem_obj)->gpu_addr;
 +
 +      retval = mm->update_mqd(mm, m, q);
 +
 +      return retval;
 +}
 +
 +static void uninit_mqd(struct mqd_manager *mm, void *mqd,
 +                      struct kfd_mem_obj *mqd_mem_obj)
 +{
 +      BUG_ON(!mm || !mqd);
 +      kfd_gtt_sa_free(mm->dev, mqd_mem_obj);
 +}
 +
 +static void uninit_mqd_sdma(struct mqd_manager *mm, void *mqd,
 +                              struct kfd_mem_obj *mqd_mem_obj)
 +{
 +      BUG_ON(!mm || !mqd);
 +      kfd_gtt_sa_free(mm->dev, mqd_mem_obj);
 +}
 +
 +static int load_mqd(struct mqd_manager *mm, void *mqd, uint32_t pipe_id,
 +                      uint32_t queue_id, uint32_t __user *wptr)
 +{
 +      return kfd2kgd->hqd_load(mm->dev->kgd, mqd, pipe_id, queue_id, wptr);
 +}
 +
 +static int load_mqd_sdma(struct mqd_manager *mm, void *mqd,
 +                      uint32_t pipe_id, uint32_t queue_id,
 +                      uint32_t __user *wptr)
 +{
 +      return kfd2kgd->hqd_sdma_load(mm->dev->kgd, mqd);
 +}
 +
 +static int update_mqd(struct mqd_manager *mm, void *mqd,
 +                      struct queue_properties *q)
 +{
 +      struct cik_mqd *m;
 +
 +      BUG_ON(!mm || !q || !mqd);
 +
 +      pr_debug("kfd: In func %s\n", __func__);
 +
 +      m = get_mqd(mqd);
 +      m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE |
 +                              DEFAULT_MIN_AVAIL_SIZE | PQ_ATC_EN;
 +
 +      /*
 +       * Calculating queue size which is log base 2 of actual queue size -1
 +       * dwords and another -1 for ffs
 +       */
 +      m->cp_hqd_pq_control |= ffs(q->queue_size / sizeof(unsigned int))
 +                                                              - 1 - 1;
 +      m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8);
 +      m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8);
 +      m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr);
 +      m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr);
 +      m->cp_hqd_pq_doorbell_control = DOORBELL_EN |
 +                                      DOORBELL_OFFSET(q->doorbell_off);
 +
 +      m->cp_hqd_vmid = q->vmid;
 +
 +      if (q->format == KFD_QUEUE_FORMAT_AQL) {
 +              m->cp_hqd_iq_rptr = AQL_ENABLE;
 +              m->cp_hqd_pq_control |= NO_UPDATE_RPTR;
 +      }
 +
 +      m->cp_hqd_active = 0;
 +      q->is_active = false;
 +      if (q->queue_size > 0 &&
 +                      q->queue_address != 0 &&
 +                      q->queue_percent > 0) {
 +              m->cp_hqd_active = 1;
 +              q->is_active = true;
 +      }
 +
 +      return 0;
 +}
 +
 +static int update_mqd_sdma(struct mqd_manager *mm, void *mqd,
 +                              struct queue_properties *q)
 +{
 +      struct cik_sdma_rlc_registers *m;
 +
 +      BUG_ON(!mm || !mqd || !q);
 +
 +      m = get_sdma_mqd(mqd);
 +      m->sdma_rlc_rb_cntl =
 +              SDMA_RB_SIZE((ffs(q->queue_size / sizeof(unsigned int)))) |
 +              SDMA_RB_VMID(q->vmid) |
 +              SDMA_RPTR_WRITEBACK_ENABLE |
 +              SDMA_RPTR_WRITEBACK_TIMER(6);
 +
 +      m->sdma_rlc_rb_base = lower_32_bits(q->queue_address >> 8);
 +      m->sdma_rlc_rb_base_hi = upper_32_bits(q->queue_address >> 8);
 +      m->sdma_rlc_rb_rptr_addr_lo = lower_32_bits((uint64_t)q->read_ptr);
 +      m->sdma_rlc_rb_rptr_addr_hi = upper_32_bits((uint64_t)q->read_ptr);
 +      m->sdma_rlc_doorbell = SDMA_OFFSET(q->doorbell_off) | SDMA_DB_ENABLE;
 +      m->sdma_rlc_virtual_addr = q->sdma_vm_addr;
 +
 +      m->sdma_engine_id = q->sdma_engine_id;
 +      m->sdma_queue_id = q->sdma_queue_id;
 +
 +      q->is_active = false;
 +      if (q->queue_size > 0 &&
 +                      q->queue_address != 0 &&
 +                      q->queue_percent > 0) {
 +              m->sdma_rlc_rb_cntl |= SDMA_RB_ENABLE;
 +              q->is_active = true;
 +      }
 +
 +      return 0;
 +}
 +
 +static int destroy_mqd(struct mqd_manager *mm, void *mqd,
 +                      enum kfd_preempt_type type,
 +                      unsigned int timeout, uint32_t pipe_id,
 +                      uint32_t queue_id)
 +{
 +      return kfd2kgd->hqd_destroy(mm->dev->kgd, type, timeout,
 +                                      pipe_id, queue_id);
 +}
 +
 +/*
 + * preempt type here is ignored because there is only one way
 + * to preempt sdma queue
 + */
 +static int destroy_mqd_sdma(struct mqd_manager *mm, void *mqd,
 +                              enum kfd_preempt_type type,
 +                              unsigned int timeout, uint32_t pipe_id,
 +                              uint32_t queue_id)
 +{
 +      return kfd2kgd->hqd_sdma_destroy(mm->dev->kgd, mqd, timeout);
 +}
 +
 +static bool is_occupied(struct mqd_manager *mm, void *mqd,
 +                      uint64_t queue_address, uint32_t pipe_id,
 +                      uint32_t queue_id)
 +{
 +
++      return kfd2kgd->hqd_is_occupied(mm->dev->kgd, queue_address,
 +                                      pipe_id, queue_id);
 +
 +}
 +
 +static bool is_occupied_sdma(struct mqd_manager *mm, void *mqd,
 +                      uint64_t queue_address, uint32_t pipe_id,
 +                      uint32_t queue_id)
 +{
 +      return kfd2kgd->hqd_sdma_is_occupied(mm->dev->kgd, mqd);
 +}
 +
 +/*
 + * HIQ MQD Implementation, concrete implementation for HIQ MQD implementation.
 + * The HIQ queue in Kaveri is using the same MQD structure as all the user mode
 + * queues but with different initial values.
 + */
 +
 +static int init_mqd_hiq(struct mqd_manager *mm, void **mqd,
 +              struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr,
 +              struct queue_properties *q)
 +{
 +      uint64_t addr;
 +      struct cik_mqd *m;
 +      int retval;
 +
 +      BUG_ON(!mm || !q || !mqd || !mqd_mem_obj);
 +
 +      pr_debug("kfd: In func %s\n", __func__);
 +
 +      retval = kfd_gtt_sa_allocate(mm->dev, sizeof(struct cik_mqd),
 +                                      mqd_mem_obj);
 +
 +      if (retval != 0)
 +              return -ENOMEM;
 +
 +      m = (struct cik_mqd *) (*mqd_mem_obj)->cpu_ptr;
 +      addr = (*mqd_mem_obj)->gpu_addr;
 +
 +      memset(m, 0, ALIGN(sizeof(struct cik_mqd), 256));
 +
 +      m->header = 0xC0310800;
 +      m->compute_pipelinestat_enable = 1;
 +      m->compute_static_thread_mgmt_se0 = 0xFFFFFFFF;
 +      m->compute_static_thread_mgmt_se1 = 0xFFFFFFFF;
 +      m->compute_static_thread_mgmt_se2 = 0xFFFFFFFF;
 +      m->compute_static_thread_mgmt_se3 = 0xFFFFFFFF;
 +
 +      m->cp_hqd_persistent_state = DEFAULT_CP_HQD_PERSISTENT_STATE |
 +                                      PRELOAD_REQ;
 +      m->cp_hqd_quantum = QUANTUM_EN | QUANTUM_SCALE_1MS |
 +                              QUANTUM_DURATION(10);
 +
 +      m->cp_mqd_control             = MQD_CONTROL_PRIV_STATE_EN;
 +      m->cp_mqd_base_addr_lo        = lower_32_bits(addr);
 +      m->cp_mqd_base_addr_hi        = upper_32_bits(addr);
 +
 +      m->cp_hqd_ib_control = DEFAULT_MIN_IB_AVAIL_SIZE;
 +
 +      /*
 +       * Pipe Priority
 +       * Identifies the pipe relative priority when this queue is connected
 +       * to the pipeline. The pipe priority is against the GFX pipe and HP3D.
 +       * In KFD we are using a fixed pipe priority set to CS_MEDIUM.
 +       * 0 = CS_LOW (typically below GFX)
 +       * 1 = CS_MEDIUM (typically between HP3D and GFX
 +       * 2 = CS_HIGH (typically above HP3D)
 +       */
 +      m->cp_hqd_pipe_priority = 1;
 +      m->cp_hqd_queue_priority = 15;
 +
 +      *mqd = m;
 +      if (gart_addr)
 +              *gart_addr = addr;
 +      retval = mm->update_mqd(mm, m, q);
 +
 +      return retval;
 +}
 +
 +static int update_mqd_hiq(struct mqd_manager *mm, void *mqd,
 +                              struct queue_properties *q)
 +{
 +      struct cik_mqd *m;
 +
 +      BUG_ON(!mm || !q || !mqd);
 +
 +      pr_debug("kfd: In func %s\n", __func__);
 +
 +      m = get_mqd(mqd);
 +      m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE |
 +                              DEFAULT_MIN_AVAIL_SIZE |
 +                              PRIV_STATE |
 +                              KMD_QUEUE;
 +
 +      /*
 +       * Calculating queue size which is log base 2 of actual queue
 +       * size -1 dwords
 +       */
 +      m->cp_hqd_pq_control |= ffs(q->queue_size / sizeof(unsigned int))
 +                                                              - 1 - 1;
 +      m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8);
 +      m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8);
 +      m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr);
 +      m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr);
 +      m->cp_hqd_pq_doorbell_control = DOORBELL_EN |
 +                                      DOORBELL_OFFSET(q->doorbell_off);
 +
 +      m->cp_hqd_vmid = q->vmid;
 +
 +      m->cp_hqd_active = 0;
 +      q->is_active = false;
 +      if (q->queue_size > 0 &&
 +                      q->queue_address != 0 &&
 +                      q->queue_percent > 0) {
 +              m->cp_hqd_active = 1;
 +              q->is_active = true;
 +      }
 +
 +      return 0;
 +}
 +
 +struct cik_sdma_rlc_registers *get_sdma_mqd(void *mqd)
 +{
 +      struct cik_sdma_rlc_registers *m;
 +
 +      BUG_ON(!mqd);
 +
 +      m = (struct cik_sdma_rlc_registers *)mqd;
 +
 +      return m;
 +}
 +
 +struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type,
 +              struct kfd_dev *dev)
 +{
 +      struct mqd_manager *mqd;
 +
 +      BUG_ON(!dev);
 +      BUG_ON(type >= KFD_MQD_TYPE_MAX);
 +
 +      pr_debug("kfd: In func %s\n", __func__);
 +
 +      mqd = kzalloc(sizeof(struct mqd_manager), GFP_KERNEL);
 +      if (!mqd)
 +              return NULL;
 +
 +      mqd->dev = dev;
 +
 +      switch (type) {
 +      case KFD_MQD_TYPE_CP:
 +      case KFD_MQD_TYPE_COMPUTE:
 +              mqd->init_mqd = init_mqd;
 +              mqd->uninit_mqd = uninit_mqd;
 +              mqd->load_mqd = load_mqd;
 +              mqd->update_mqd = update_mqd;
 +              mqd->destroy_mqd = destroy_mqd;
 +              mqd->is_occupied = is_occupied;
 +              break;
 +      case KFD_MQD_TYPE_HIQ:
 +              mqd->init_mqd = init_mqd_hiq;
 +              mqd->uninit_mqd = uninit_mqd;
 +              mqd->load_mqd = load_mqd;
 +              mqd->update_mqd = update_mqd_hiq;
 +              mqd->destroy_mqd = destroy_mqd;
 +              mqd->is_occupied = is_occupied;
 +              break;
 +      case KFD_MQD_TYPE_SDMA:
 +              mqd->init_mqd = init_mqd_sdma;
 +              mqd->uninit_mqd = uninit_mqd_sdma;
 +              mqd->load_mqd = load_mqd_sdma;
 +              mqd->update_mqd = update_mqd_sdma;
 +              mqd->destroy_mqd = destroy_mqd_sdma;
 +              mqd->is_occupied = is_occupied_sdma;
 +              break;
 +      default:
 +              kfree(mqd);
 +              return NULL;
 +      }
 +
 +      return mqd;
 +}
 +
index bfcf45f30b76937402ade90bc98427187534ba7d,b3dc13c83169c1a3fb5cd54c9ae179aaf9508d36..1b35a9c87437d89cf761c5d2e9e992ffe7813ae3
@@@ -149,21 -135,6 +149,14 @@@ struct kfd_dev 
  
        struct kgd2kfd_shared_resources shared_resources;
  
-       void *interrupt_ring;
-       size_t interrupt_ring_size;
-       atomic_t interrupt_ring_rptr;
-       atomic_t interrupt_ring_wptr;
-       struct work_struct interrupt_work;
-       spinlock_t interrupt_lock;
 +      void *gtt_mem;
 +      uint64_t gtt_start_gpu_addr;
 +      void *gtt_start_cpu_ptr;
 +      void *gtt_sa_bitmap;
 +      struct mutex gtt_sa_lock;
 +      unsigned int gtt_sa_chunk_size;
 +      unsigned int gtt_sa_num_of_chunks;
 +
        /* QCM Device instance */
        struct device_queue_manager *dqm;
  
index 883499740e3314e3a49767c2b755d1db8bc16fec,96a512208fade6825da6aa8e2645f2a088d485d2..239bc16a1ddd61c9fd65d3d1f1284025fd69df2c
@@@ -178,9 -183,7 +178,9 @@@ struct kfd2kgd_calls 
        int (*hqd_load)(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
                        uint32_t queue_id, uint32_t __user *wptr);
  
-       bool (*hqd_is_occupies)(struct kgd_dev *kgd, uint64_t queue_address,
 +      int (*hqd_sdma_load)(struct kgd_dev *kgd, void *mqd);
 +
+       bool (*hqd_is_occupied)(struct kgd_dev *kgd, uint64_t queue_address,
                                uint32_t pipe_id, uint32_t queue_id);
  
        int (*hqd_destroy)(struct kgd_dev *kgd, uint32_t reset_type,
Simple merge
Simple merge
Simple merge
index d01db1b8286984fb87210b96eb95f387324025ff,e7a16f119a294d0d20d0afa832d6d0b2a803edd7..dc266e772340f4c397d7b39a1522cc5fa171869b
@@@ -9703,10 -9815,10 +9703,10 @@@ static int intel_crtc_page_flip(struct 
                if (obj->tiling_mode != work->old_fb_obj->tiling_mode)
                        /* vlv: DISPLAY_FLIP fails to change tiling */
                        ring = NULL;
-       } else if (IS_IVYBRIDGE(dev)) {
+       } else if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) {
                ring = &dev_priv->ring[BCS];
        } else if (INTEL_INFO(dev)->gen >= 7) {
 -              ring = obj->ring;
 +              ring = i915_gem_request_get_ring(obj->last_read_req);
                if (ring == NULL || ring->id != RCS)
                        ring = &dev_priv->ring[BCS];
        } else {
Simple merge
Simple merge
Simple merge
Simple merge
index ddbabab5d875243784391cbba71657db983e1886,8bf87f1203ccaddd85a215dc0c5e19fb48305dbf..7b274205eeaf05d0e2001848a4449091d0962db2
@@@ -69,8 -71,8 +69,8 @@@ static int kgd_init_pipeline(struct kgd
  
  static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
                        uint32_t queue_id, uint32_t __user *wptr);
 -
 +static int kgd_hqd_sdma_load(struct kgd_dev *kgd, void *mqd);
- static bool kgd_hqd_is_occupies(struct kgd_dev *kgd, uint64_t queue_address,
+ static bool kgd_hqd_is_occupied(struct kgd_dev *kgd, uint64_t queue_address,
                                uint32_t pipe_id, uint32_t queue_id);
  
  static int kgd_hqd_destroy(struct kgd_dev *kgd, uint32_t reset_type,
@@@ -88,13 -89,11 +88,13 @@@ static const struct kfd2kgd_calls kfd2k
        .get_max_engine_clock_in_mhz = get_max_engine_clock_in_mhz,
        .program_sh_mem_settings = kgd_program_sh_mem_settings,
        .set_pasid_vmid_mapping = kgd_set_pasid_vmid_mapping,
 -      .init_memory = kgd_init_memory,
        .init_pipeline = kgd_init_pipeline,
        .hqd_load = kgd_hqd_load,
-       .hqd_is_occupies = kgd_hqd_is_occupies,
 +      .hqd_sdma_load = kgd_hqd_sdma_load,
+       .hqd_is_occupied = kgd_hqd_is_occupied,
 +      .hqd_sdma_is_occupied = kgd_hqd_sdma_is_occupied,
        .hqd_destroy = kgd_hqd_destroy,
 +      .hqd_sdma_destroy = kgd_hqd_sdma_destroy,
        .get_fw_version = get_fw_version
  };
  
@@@ -490,46 -533,7 +506,46 @@@ static int kgd_hqd_load(struct kgd_dev 
        return 0;
  }
  
- static bool kgd_hqd_is_occupies(struct kgd_dev *kgd, uint64_t queue_address,
 +static int kgd_hqd_sdma_load(struct kgd_dev *kgd, void *mqd)
 +{
 +      struct cik_sdma_rlc_registers *m;
 +      uint32_t sdma_base_addr;
 +
 +      m = get_sdma_mqd(mqd);
 +      sdma_base_addr = get_sdma_base_addr(m);
 +
 +      write_register(kgd,
 +                      sdma_base_addr + SDMA0_RLC0_VIRTUAL_ADDR,
 +                      m->sdma_rlc_virtual_addr);
 +
 +      write_register(kgd,
 +                      sdma_base_addr + SDMA0_RLC0_RB_BASE,
 +                      m->sdma_rlc_rb_base);
 +
 +      write_register(kgd,
 +                      sdma_base_addr + SDMA0_RLC0_RB_BASE_HI,
 +                      m->sdma_rlc_rb_base_hi);
 +
 +      write_register(kgd,
 +                      sdma_base_addr + SDMA0_RLC0_RB_RPTR_ADDR_LO,
 +                      m->sdma_rlc_rb_rptr_addr_lo);
 +
 +      write_register(kgd,
 +                      sdma_base_addr + SDMA0_RLC0_RB_RPTR_ADDR_HI,
 +                      m->sdma_rlc_rb_rptr_addr_hi);
 +
 +      write_register(kgd,
 +                      sdma_base_addr + SDMA0_RLC0_DOORBELL,
 +                      m->sdma_rlc_doorbell);
 +
 +      write_register(kgd,
 +                      sdma_base_addr + SDMA0_RLC0_RB_CNTL,
 +                      m->sdma_rlc_rb_cntl);
 +
 +      return 0;
 +}
 +
+ static bool kgd_hqd_is_occupied(struct kgd_dev *kgd, uint64_t queue_address,
                                uint32_t pipe_id, uint32_t queue_id)
  {
        uint32_t act;