def Int_MemBarrierNoSSE64 : RI<0x09, MRM1r, (outs), (ins GR64:$zero),
"lock\n\t"
"or{q}\t{$zero, (%rsp)|(%rsp), $zero}",
- [(X86MemBarrierNoSSE GR64:$zero)]>, LOCK;
+ [(X86MemBarrierNoSSE GR64:$zero)]>,
+ Requires<[In64BitMode]>, LOCK;
let Defs = [RAX, EFLAGS], Uses = [RAX] in {
def LCMPXCHG64 : RI<0xB1, MRMDestMem, (outs), (ins i64mem:$ptr, GR64:$swap),
def Int_MemBarrierNoSSE : I<0x09, MRM1r, (outs), (ins GR32:$zero),
"lock\n\t"
"or{l}\t{$zero, (%esp)|(%esp), $zero}",
- [(X86MemBarrierNoSSE GR32:$zero)]>, LOCK;
+ [(X86MemBarrierNoSSE GR32:$zero)]>,
+ Requires<[In32BitMode]>, LOCK;
}
// Atomic swap. These are just normal xchg instructions. But since a memory