#ifndef LLVM_MC_MCINST_H
#define LLVM_MC_MCINST_H
+#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/System/DataTypes.h"
kInvalid, ///< Uninitialized.
kRegister, ///< Register operand.
kImmediate, ///< Immediate operand.
+ kFPImmediate, ///< Floating-point immediate operand.
kExpr ///< Relocatable immediate operand.
};
unsigned char Kind;
int64_t ImmVal;
const MCExpr *ExprVal;
};
+ // This can't go in the union due to the non-trivial copy constructor
+ // of APFloat. It's still only valid for Kind == kFPImmediate, though.
+ APFloat FPImmVal;
public:
- MCOperand() : Kind(kInvalid) {}
+ MCOperand() : Kind(kInvalid), FPImmVal(0.0) {}
bool isValid() const { return Kind != kInvalid; }
bool isReg() const { return Kind == kRegister; }
bool isImm() const { return Kind == kImmediate; }
+ bool isFPImm() const { return Kind == kFPImmediate; }
bool isExpr() const { return Kind == kExpr; }
/// getReg - Returns the register number.
ImmVal = Val;
}
+ const APFloat &getFPImm() const {
+ assert(isFPImm() && "This is not an FP immediate");
+ return FPImmVal;
+ }
+
+ void setFPImm(const APFloat &Val) {
+ assert(isFPImm() && "This is not an FP immediate");
+ FPImmVal = Val;
+ }
+
const MCExpr *getExpr() const {
assert(isExpr() && "This is not an expression");
return ExprVal;
Op.ImmVal = Val;
return Op;
}
+ static MCOperand CreateFPImm(const APFloat &Val) {
+ MCOperand Op;
+ Op.Kind = kFPImmediate;
+ Op.FPImmVal = Val;
+ return Op;
+ }
static MCOperand CreateExpr(const MCExpr *Val) {
MCOperand Op;
Op.Kind = kExpr;
#include "ARMMCInstLower.h"
//#include "llvm/CodeGen/MachineModuleInfoImpls.h"
#include "llvm/CodeGen/AsmPrinter.h"
+#include "llvm/Constants.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
MCOp = LowerSymbolOperand(MO, Printer.GetBlockAddressSymbol(
MO.getBlockAddress()));
break;
+ case MachineOperand::MO_FPImmediate:
+ MCOp = MCOperand::CreateFPImm(MO.getFPImm()->getValueAPF());
+ break;
}
OutMI.addOperand(MCOp);
void ARMInstPrinter::printVFPf32ImmOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O) {
- O << '#' << MI->getOperand(OpNum).getImm();
+ O << '#' << MI->getOperand(OpNum).getFPImm().convertToFloat();
}
void ARMInstPrinter::printVFPf64ImmOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O) {
- O << '#' << MI->getOperand(OpNum).getImm();
+ O << '#' << MI->getOperand(OpNum).getFPImm().convertToDouble();
}
void ARMInstPrinter::printNEONModImmOperand(const MCInst *MI, unsigned OpNum,