Fix broken CellSPU lowering, re-instate braces in Legalize
authorNate Begeman <natebegeman@mac.com>
Tue, 29 Jul 2008 19:07:27 +0000 (19:07 +0000)
committerNate Begeman <natebegeman@mac.com>
Tue, 29 Jul 2008 19:07:27 +0000 (19:07 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54168 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
lib/Target/CellSPU/SPUISelLowering.cpp

index 8cdfcfa2acfd0c2bf0effbd4b346126dacb71c31..d8d45d04eb72f5b535363b9228995aea5479656e 100644 (file)
@@ -2976,12 +2976,10 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
     case TargetLowering::Legal: break;
     case TargetLowering::Custom:
       Tmp1 = TLI.LowerOperation(Result, DAG);
-      if (Tmp1.Val) 
-      // FIXME: these braces are correct, but breaks CellSPU codegen.
-      //{
+      if (Tmp1.Val) {
         Result = Tmp1;
         break;
-      //}
+      }
       // Fall through if the custom lower can't deal with the operation
     case TargetLowering::Expand: {
       MVT VT = Op.getValueType();
index 2fd72511baac43e6579ed86181477b932c7c1fc7..5f621ed8ec4c93cb0b424daeda92fd86e31c8b7a 100644 (file)
@@ -2481,8 +2481,9 @@ LowerByteImmed(SDValue Op, SelectionDAG &DAG) {
                          DAG.getNode(ISD::BUILD_VECTOR, VT, tcVec, tcVecSize));
     }
   }
-
-  return SDValue();
+  // These operations (AND, OR, XOR) are legal, they just couldn't be custom
+  // lowered.  Return the operation, rather than a null SDValue.
+  return Op;
 }
 
 //! Lower i32 multiplication